Principle and Application of DC-DC Converter

       When the last joule of energy in your battery is gone, power consumption and efficiency really take on new meanings. Take a typical mobile phone, for example. Even when you are not using the phone to make a call, power is consumed by tasks such as lighting up the LCD screen and displaying the time and the network operator being used. If it is a more advanced phone, you can also play your favorite MP3 music or browse video data. However, every time you add a function to the phone, you actually add a burden on the battery. For most mobile phone designers, the key to how long your phone can last before the next charge is whether it can extend the use of available power. This means that power needs to be carefully conserved and budgeted among various functional modules to maximize battery life and use.

　　To achieve true efficiency, it does not only mean how high the efficiency of the DC-DC converter can be at a certain operating point specified by the load, but how long this high efficiency can be maintained over the entire load range of the DC-DC converter. Generally speaking, most DC-DC converters specify the maximum efficiency figure that can be achieved, and people also choose a suitable converter without hesitation by choosing a very large number (such as 95%). However, to really make full use of this efficiency, it is also necessary to crank the converter to the operating point where maximum power conversion can be achieved. If it is not turned to this point, 95% efficiency cannot be achieved. And because of this problem, sometimes even 60% efficiency cannot be achieved, depending on the applied load.

　　Figure 1 shows that while 95% efficiency can be achieved at point A, only 60% or even lower efficiency can be achieved at point B. This difference in operating point or load scale is very important for portable consumer products because most of these electronic devices have multiple functions (such as playing music, taking pictures, or making phone calls), each of which requires a different operating point or different effective load on the DC-DC regulator. For those functions that are not invoked by the user, the power load on the DC-DC source will be very light, and the 95% efficiency will drop sharply to 50% or even lower, as it is at point B in Figure 1.

Figure 1 Typical efficiency curve

　　Take smartphones, for example. In smartphones, it is important to know how long it will take for the DC-DC converter that powers the AP (application processor) IO or core voltage to drain the battery. Assume that your phone battery can last for a maximum of 2-3 days in normal use (i.e., mainly voice calls). During this time (48-72 hours), only a small portion of the power is usually used for entertainment activities, such as taking and browsing photos or playing MP3 music. It means that the phone does not need the AP to do much during the rest of the time; it may only be used to refresh the DDR memory when the AP is in standby or sleep mode. Therefore, if the AP is often in these modes, the load it brings to the converter will be at the light load end of the scale, that is, point B. This means that the power of the AP regulator will always run at 50% or even lower efficiency, making it the single largest drain on the battery. It can be seen that it is not enough to just choose a DC-DC regulator with a high efficiency specification. It is also necessary to ensure that the regulator can provide high efficiency throughout the load range, especially at light load and full load.

　　Innovative solutions are needed to address this problem. Take, for example, a new DC-DC buck converter from Freescale that provides high efficiency at light loads. The MC34726/7 series is a synchronous buck converter that can deliver up to 300mA or 600mA while achieving 90% efficiency. The converter's efficiency is shown in Figure 2, which maintains high efficiency over the entire load range, peaking near the maximum load. For light loads (point B), efficiency is also maintained above 80%. The device uses a dedicated adjustable Z-factor mode (Z-Mode) switching architecture to achieve smooth transitions between PWM and PFM without sacrificing transient response, bias current, or efficiency. As a result, the Z-Mode architecture greatly improves performance during load current transitions, providing better transient response while still maintaining a low bias current of 65μA at light loads in the "sleep" Z-Mode.

Figure 2 Improving efficiency at light loads

　　The device accepts an input voltage range of 2.7 to 5.5V and can provide an output voltage of 0.8 to 3.3V at a continuous load current of 300mA/600mA. In addition, its high switching frequency of 2MHz or 4MHz also makes it very suitable for space-constrained portable devices such as mobile phones, PDAs, DSCs, PNDs, GPS, PMPs and other portable instruments. Figure 3 shows a typical application of the device.

Figure 3 Typical application diagram