Research on Fully Digital DC-DC Converter

Introduction

The phase-shifted full-bridge ZVS DC-DC converter is one of the most widely used soft switching circuits. As a phase-shifted full-bridge converter with excellent performance, the switch tubes of its two bridge arms operate under zero voltage soft switching conditions, with low switching loss and simple structure. It conforms to the development trend of miniaturization and high frequency of DC power supply, so it has been widely used in medium and high power DC-DC conversion occasions, and the digital control of the system can further improve the reliability of the system. The digital system has complete programmable capabilities, which makes program modification, algorithm upgrade, and function transplantation very easy, and has obvious advantages over analog control methods. The digital control of DC-DC converters is one of the current research hotspots. This paper analyzes the main circuit principle, uses TMS320LF2407 as the main control chip to realize the full digital control of the ZVS DC-DC converter, and gives the experimental results.

1 Main circuit topology and working principle

The main circuit structure of the ZVS PWM DC-DC full-bridge converter is shown in Figure 1, and its main waveforms are shown in Figure 2. As can be seen from Figure 1, the circuit structure is similar to that of the ordinary bipolar PWM converter. Q1, D1 and Q4, D4 form the leading bridge arm, Q2, D2 and Q3, D3 form the lagging bridge arm; C1~C4 are the resonant capacitors of Q1~Q4, including parasitic capacitance and external capacitance; Lr is the resonant inductor, including the leakage inductance of the transformer; T secondary side and DR1, DR2 form a full-wave rectifier circuit, Lf, Cf form an output filter, and R1 is the load. Q1 and Q3 lead Q4 and Q2 by a certain phase (i.e., phase shift angle) respectively, and the output voltage is adjusted by adjusting the size of the phase shift angle. As shown in Figure 2, in one switching cycle, the phase-shifted full-bridge ZVS PWM DC-DC converter has 12 switching modes. By controlling the four switch tubes Q1~Q4, an AC square wave voltage with an amplitude of Vin is obtained at points A and B; after isolation and transformation by the high-frequency transformer, an AC square wave voltage with an amplitude of Vin/K is obtained on the secondary side of the transformer, and then through the output rectifier bridge composed of DR1 and DR2, a DC square wave voltage with an amplitude of Vin/K is obtained. This DC square wave voltage becomes a flat DC voltage after passing through the output filter composed of Lf and Cf, and its voltage value is Uo=DVin/K (D is the duty cycle). Ton is the conduction time and Ts is the switching cycle (T=t12-t0). The output voltage Uo is adjusted by adjusting the duty cycle D.

As can be seen from the waveform diagram, the characteristics of the phase-shifted full-bridge circuit control method are:

① In a switching cycle Ts, the on-time of each switch is slightly less than Ts/2, and the off-time is slightly greater than Ts/2.

② In the same half-bridge, the upper and lower switches cannot be in the on state at the same time. Each switch must go through a certain dead time from the off to the on of another switch.

③ Comparing the switching function waveforms of the two pairs of switch tubes Q1, Q4 and Q2, Q3 that are diagonally opposite to each other, the waveform of Q1 leads the waveform of Q4 by 0 to Ton/2 time, and the waveform of Q2 leads the waveform of Q3 by 0 to Ton/2 time. Therefore, Q1 and Q2 are leading bridge arms, and Q3 and Q4 are lagging bridge arms.

2 Control chip TMS320LF2407A

TMS320LF2407A is a digital signal processor designed by TI, which has the advantages of convenient interface, simple programming, good stability, high precision, convenience and repeatability. Some functions of TMS320LF2407A are as follows:
① The working voltage is 3.3 V, and there are 4 low-power working modes. When designing the circuit, level conversion should be considered and the working voltage of DSP should not be exceeded.

② The shortest single instruction cycle is 25 ns (40 MHz), the highest operation speed can reach 40MIPS, and the four-level instruction execution pipeline. Low power consumption is beneficial to battery-powered occasions; and the high speed is very suitable for real-time control of motors.

③ It has 2 event managers (EV) dedicated to motor control, each of which contains: 2 16-bit general-purpose timers, 8 16-bit pulse width modulation (PWM) output channels, 1 external pin/PDPINTx that can quickly block the output (its status can be obtained from the COMCONx register), a programmable dead zone function that can prevent the upper and lower bridge arms from passing through, 3 capture units, and 1 incremental photoelectric position encoder interface.

④ 16-channel 10-bit A/D converter with programmable automatic sequencing function, 4 trigger sources for starting A/D conversion, and the fastest A/D conversion time is 375 ns.

⑤ Controller Area Network (CAN) 2.0B module.

⑥ Serial interface SPI and SCI module.

⑦ Clock generator based on phase-locked loop (PLL).

⑧ 41 general-purpose I/O pins. ⑨

32-bit accumulator and 32-bit central arithmetic logic unit (CALU); 16-bit × 16-bit parallel multiplier, which can realize multiplication operation in a single instruction cycle; 5 external interrupts.

⑩ 1149.1-1990 IEEE standard JTAG simulation interface.

⑾ Very wide operating temperature range, ordinary grade is -40～85℃, special grade is -40～125℃.
3 Digital implementation of the system

Figure 3 is a block diagram of the converter hardware structure. As can be seen from the figure, the system adopts a closed-loop control method. The voltage and current on both sides of the converter are detected by the Hall detection circuit and converted into corresponding voltage signals for filtering. The obtained feedback signal is sent to the DSP chip for A/D conversion and then closed-loop control operation, and is also sent to the fault protection circuit. The voltage loop of this system adopts PI regulator. The digital PI regulator makes deviation adjustment according to the given value and the feedback signal value. Its output determines the size of the phase shift angle of the PWM drive waveform between the leading and lagging arms, so that the control quantity tracks the given value; the drive signal sent by the DSP is converted by the level conversion circuit and sent to the driver chip M57962L to form the final IGBT drive signal. The fault protection circuit judges and processes the current and voltage feedback signals, gives a fault signal when a fault occurs, sets the PWM to an invalid mode from the software, and immediately blocks the IGBT drive in the hardware to protect the system. The digital tube display circuit consists of a MAX7219 with an SPI interface and a multi-digit digital tube. The MAX7219 is suitable for the standard SPI communication mode, and also has decoding, driving and data latching functions. Each MAX7219 can intelligently manage the 4-digit digital tube in a scanning mode, greatly reducing the time the microprocessor uses for real-time display.

3.1 Direct phase-shift pulse generation method based on DSP

Phase shift is a periodic delay between the lagging arm drive and the leading arm drive, and its delay angle is the phase shift angle. Assume that PWM1/PWM2 drives the leading arm switch tube, and PWM3/PWM4 drives the lagging arm switch tube. The drive between the upper and lower tubes of each bridge arm is complementary and has a dead zone. In the implementation, the driving of the leading arm can be fixed to be issued at the time T0 of each cycle. Then, as long as the full comparison event occurs again after the time corresponding to the delayed phase shift angle φ, the driving of the lagging arm can be obtained, and the free phase shift within the range of 0° to 180° can be realized. As shown in Figure 4, the counting mode of timer T1 is a continuous increase and decrease mode. When the counter T1CNT=0 and T1CNT=T1PR, the values ​​of CMPR1 and CMPR2 are updated respectively. This process can be completed in the underflow interrupt and periodic interrupt of T1 respectively. Assume that the delay time corresponding to the phase shift angle φ is Td. Obviously, in the time period of 0 to T/2 and T/2 to T, the relationship between the values ​​of CMPR1 and CMPR2 can be expressed as follows:

Kp2, and its program flow is shown in Figure 6.

4 Experimental results

According to the above scheme, the experimental system was built. In the experiment, Mitsubishi's intelligent power module (IPM) PM200DSA120 was used as the main switch device of the inverter. It has strong anti-interference ability, fast switching speed, low power consumption, and has functions such as drive power undervoltage protection, bridge arm tube interlocking protection, overcurrent protection and overheating protection. The switching frequency is fs = 10 kHz, the turn-on time is ton. = 1.4μs, and the turn-off time is toff = 2.0μs. The experimental waveforms are shown in Figures 7 to 9. Figure 7 is the complementary waveform of PWM1 and PWM2. It can be seen from the figure that there is a dead zone between them. The dead zone is programmable and can be determined according to actual conditions. Figure 8 is the waveform of the phase shift of 15° between PWM1 and PWM3. The phase shift angle can be controlled by the program and automatically adjusted according to the given and load size. Figure 9 is the driving waveform of the T1 tube, with a positive voltage of approximately 15 V and a negative voltage of approximately 9 V.

5 Conclusion

This paper studies the phase-shifted full-bridge fully digital ZVS DC/DC converter, analyzes its working principle in detail, gives its digital implementation scheme, and conducts experiments. The experimental results show the feasibility of the scheme. The phase-shifted full-bridge fully digital ZVS DC/DC converter based on DSP has a simple structure, reliable operation, easy implementation, convenient debugging, complete functions, and the dynamic and static performance is as good as that of the analog converter, and has a good application prospect.