A superior alternative to integrated MOSFET drivers
Figure 1 shows discrete components used to control the conduction of Q2 in a synchronous flyback topology . This circuit allows you to control the turn-on gate current and protect the rectifier gate from high reverse voltage damage. The circuit can be driven with a negative voltage at the transformer output. The 12V input is very negative compared to the 5V output, causing Q1 to conduct and short the gate-source voltage on the power FET Q2, quickly turning it off. Because the base current flows through R2, there is a negative voltage on the speed-up capacitor C1. During this time, the primary FET will conduct and store energy in the transformer magnetizing inductance. The transformer output voltage swings in the positive voltage range when the primary FET is off. The Q2 gate-source is quickly forward biased through D1 and R1. D2 protects the Q1 base-emitter connection while C1 is discharged. The circuit remains in this state until the primary FET is turned on again. As with a synchronous buck converter, the output current actually discharges the output capacitor. Turning on the primary FET decays the voltage on the transformer secondary and removes the positive drive to Q2. This transition results in significant shoot-through times combined with the primary FET and Q2 conduction times. To minimize this time, Q1 shorts the gate-to-source across the synchronous rectifier as quickly as possible when both the primary and secondary FETs are turned on.
Figure 1: Q1 quickly turns off the synchronous reverse FET Q2
Figure 2 shows the discrete drivers used to control the conduction of Q1 and Q4 in a synchronous forward converter. In this particular design, the input voltage is wide. This means that the gates of the two FETs may have voltages exceeding their rated voltages, so a clamping circuit is required. This circuit turns on Q4 when the transformer output voltage is negative. Diodes D2 and D4 limit the positive drive voltage to about 4.5V. D1 and D3 turn off the FET, which is driven by the current in the transformer and inductor. Q1 and Q4 clamp the reverse gate voltage to ground. In this design, the FETs have relatively small gate inductances, so the switching is very fast. Larger FETs may require the implementation of a PNP transistor to decouple the gate capacitance from the transformer winding and increase the switching speed. Selecting the right package for the gate drive converters Q2 and Q3 is critical because these packages consume a lot of power in the converter (this is because they act as linear regulators during the discharge of the FET gate capacitance). In addition, the power dissipation in R1 and R2 may also be high due to the higher output voltage.
Figure 2: D2 and D4 limit the positive gate voltage in this synchronous forward driver.
In summary, many power supplies with synchronous rectifiers can use the transformer winding voltage to drive the gate of the synchronous rectifier. Wide input range or high output voltage requires regulation circuits to protect the gate. In the synchronous flyback structure shown in Figure 1, we showed you how to control the reverse voltage on the synchronous rectifier gate while maintaining fast switching transitions. Similarly, in the synchronous forward structure of Figure 2, we showed you how to limit the positive drive voltage on the synchronous rectifier gate.
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