Improving power efficiency for multi-core processors

Mobile consumer devices such as smartphones, tablets and ultrabooks face growing demands for rich, diverse and instantaneous network multimedia experiences. Almost every part of the system design, from the screen and peripherals (such as radios, cameras and data interfaces) to the application processor, is changing. These changes have a significant impact on the implementation of power management functions, which not only need to manage the power of the entire system, but also need to improve the efficiency of power to achieve longer battery life.

For example, today's most popular mobile devices are equipped with multiple cameras, including front and rear cameras, some of which can also support 3D photography and video recording, with resolutions of up to 41 million pixels in some cases. Currently, large screen sizes are becoming more and more popular for a better visual experience, accompanied by the use of capacitive multi-touch functions and a trend towards 3D-enabled screens in some of the most advanced models.

In terms of wireless connectivity, in addition to GSM, Bluetooth, Wi-Fi and GPS, new applications for mobile payments using near-field communication (NFC) technology have added more radio frequency (RF) connections. Today's tablet and smartphone users also expect high-quality call effects, that is, louder and higher-quality speaker performance, high-quality microphones, and high-definition audio playback. In addition, the popularity of applications such as social networking and mobile web browsing means that users are also getting more data bandwidth through 3G and 4G LTE.

Looking inside the internal system that users never see, application processors have evolved from single-core to dual-core and even to the current quad-core configuration in just a year or two to handle increasingly diverse and high-performance functions. Some of the latest multi-core application processor families also integrate additional peripherals such as DRAM controllers and media/graphics coprocessors such as ARM Neon.

The increasing number of peripherals and processor cores found in today's mobile processor platforms has also driven the need for increasingly complex power management functions. Power management must also be able to handle more complex charging scenarios, at least to meet the most likely charging methods that users today use to charge their devices, such as computer USB ports, car chargers, and conventional AC power chargers.

The impact of multi-core processors

Figure 1 illustrates the power management subsystems in various smartphones. To power these subsystems, the power management IC must have sufficient buck or boost converters and low dropout linear regulators (LDOs), while also meeting power-on and power-off timing, high-precision power consumption measurement, and other requirements to provide users with an estimated remaining battery life. Since timing requirements are critical in multi-core architectures, power-on and power-off control is particularly important for application processors. Intelligent power management also needs to handle an increasing number of sensors to support functions such as backlight dimming, camera gesture recognition, navigation, and proximity detection.

Figure 1: Power management functions are becoming increasingly complex in today’s mobile devices.

When processor architecture transitions from single-core to dual-core architecture, power management design usually tends to use the same power domain to power both cores. With the emergence of quad-core processors, each processor core is independently powered by a single regulator power domain, giving system designers more flexibility to control the power supply of each core. Each core in the processor can be shut down individually, and each regulator can be reasonably reduced to a smaller current that meets the worst-case requirements.