Transimpedance strikes again: Current-to-voltage conversion using MDACs

Multiplying D/A converters (MDACs) and their post-amplifiers bridge the digital to analog world. MDACs generate current values ​​proportional to the input digital code (see Figure 1). The post-amplifier converts the current signal at the DAC output to a voltage value. Using a DAC, an amplifier, and a resistor, a simple current-to-voltage conversion seems easy to achieve. However, there are issues with the stability of this circuit.

Applied in this way, the output mode of the MDAC consists of a variable current source, a resistor, and a capacitor (Figure 1a). The output resistor and capacitor values ​​depend on the input code of the DAC. In general, designing the MDAC to zero scale results in an output resistance close to infinity. Designing the DAC to full scale or any value, the output resistance should be equal to the feedback resistor RF value. (See the manufacturer's data sheet). The DAC's output capacitance CD also varies with the input code according to the internal gate node outputting data through the MDAC. At full scale, the output capacitance of the MDAC is equal to the standard value in the data sheet. At zero, the output capacitance of the MDAC is equal to approximately half of the full scale value. For stability considerations, the output values ​​of RD and CD at full scale are used.

The amplifier feedback network is a second order subnetwork. To ensure accuracy, most MDACs have an on-chip feedback resistor. The feedback capacitor CF is separate.

Finally, the op amp has a number of specifications that have no impact on the stability of the MDAC circuit: unity-gain bandwidth fU, input differential capacitance CDIF, and common-mode capacitance CCM.

In this system, the total capacitance at the amplifier input is equal to CIN = CD + CDIF + CCM. In Figure 1b and Figure 1c, the closed-loop zero is equal to f1 = 1/(2π(CIN + CF)(RD||RF)). The closed-loop pole is equal to f2 = 1/(2πCFRF).

If the closing speed between the open and closed-loop gain curves is equal to 20dB/decade, the system is guaranteed to be stable. To achieve this, choose an amplifier with a unity-gain bandwidth less than f1 or greater than f2.

If f1 is larger than the amplifier bandwidth, it is easy to design a stable circuit:

On the other hand, if f2 is below the intersection of the open and closed loop gain curves, use:

Use these calculated values ​​of feedback capacitance as a starting point for testing the circuit. If problems arise with circuit parasitics, device manufacturing variations, etc., try changing the feedback capacitance value.

Stabilizing the analog signal of the MDAC is key. However, factors such as amplifier noise, input bias current, bias voltage, MDAC resolution, and glitch energy must also be considered.

Original English:

Transimpedance strikes again: Current-to-voltage conversion with MDACs

Current-to-voltage conversion seems easy to implement with a DAC, amplifier, and resistor. But beware of stability issues.

By Bonnie Baker -- EDN, 7/5/2007

Multiplying DACs (MDACs) and their postamplifiers bridge the digital and analog worlds. MDACs generate a current proportional to an input digital code (Figure 1). The postamplifier converts the DAC’s current-output signal to a voltage level. A simple current-to-voltage conversion seems easy to implement with a DAC, amplifier, and resistor. However, this circuit presents stability issues.

For the application, the output model of the MDAC contains a variable current source, resistor, and capacitor (Figure 1a). The value of the output resistance and capacitance depends on the input code to the DAC. In general, programming the MDAC to zero scale causes the output resistance, RD, to be near infinite. When you program the DAC to full-scale or all ones, this resistance is equal to the feedback resistance, RF. (See the manufacturer’s data sheets.) The DAC’s output capacitance, CD, also varies with input code according to the number of internal gate-source junctions across the MDAC output. At full-scale, the MDAC output capacitance equals the data-sheet specification. At zero, the MDAC output capacitance is equal to about half the full-scale value. For stability calculations, use the full-scale output values of RD and CD.

The second subnetwork is the amplifier-feedback network. To maintain precision, most MDACs have a feedback resistor on-chip. The feedback capacitor, CF, is discrete.

Finally, op amps have a range of specifications, but only a few affect the MDAC circuit’s stability: unity-gain bandwidth, fU; input differential capacitance, CDIF; and common-mode capacitance, CCM.

In this system, total capacitance at the amplifier input is equal to CIN="CD"+CDIF+CCM. In Figure 1b and Figure 1c, the closed-loop zero is equal to f1=1/(2π(CIN+CF)(RD||RF)). The closed-loop pole is equal to f2=1/(2πCFRF).

You ensure system stability if the rate of closure between the open- and closed-loop-gain curve equals 20 dB/decade. To do so, select an amplifier with unity-gain bandwidth of less than f1 or greater than f2.

It is easy to design a stable circuit if f1 is higher than the amplifier’s bandwidth:

Alternatively, if f2 is lower than the intersection of the open- and the closed-loop-gain curve, use:

CF≤–CIN+1/(2/π(RF||RD)fU).

Use these calculated values of feedback capacitance as starting points for your test circuit. Circuit parasitics, device-manufacturing variations, and other factors can encourage you to modify the feedback-capacitor value.

Stabilizing the MDAC’s analog signal is critical. However, also consider amplifier noise, input bias current, offset voltage, MDAC resolution, and glitch energy.