Design of DC Motor Control Function Module Based on VHDL

With the development of society, the application of DC motors is becoming more and more common, and the requirements for DC motor control methods are also increasing. This paper uses the latest SOPC solution developed by ALTERA to propose a design scheme for DC motor function modules based on NiosII soft-core processors, and provides VHDL code generation function module IP cores. The generation of IP cores not only facilitates designers to use flexibly and saves resources, but also greatly shortens the design cycle. Designers can directly call IP cores to form NiosII systems as needed, and then download this system to FPGA for implementation. IP cores can not only be used in motor control, but also can be used to control some other small household appliances, full-color LEDs, etc., and have broad application prospects.

1 Overall hardware design of DC motor
As shown in Figure 1, the system is controlled by FPGA chips as a whole, and its control core is ALTERA's NiosII soft-core CPU. This paper will focus on the design and generation of the two control function modules PWM module and speed measurement module in the figure. Both control function modules use VHDL hardware description language to design and generate callable IP cores, which are compiled and simulated by QuartusII to verify their correctness. Finally, the generated custom interface function module is added to the top-level schematic diagram to complete the design of the entire speed regulation system.

2 Design of PWM Function Module
The PWM module uses the DC motor duty cycle to control the motor armature voltage, thereby controlling the speed of the DC motor. The design process is shown in Figure 2.

The simulation waveform of the PWM function module is shown in Figure 3.

As can be seen from Figure 3, a clock signal Clk is given during simulation, and Sta is used to control the forward and reverse rotation of the DC motor. 0 in Figure 3 indicates that the DC motor is in the forward state, 1 indicates stopping, and 3 indicates reversing; Conword is the duty cycle signal, and there are three values ​​of 25%, 78%, and 50% in the simulation; PWM A indicates the duty cycle output when the DC motor is in the forward state, and the output of PWM B is 0 at this time; PWM B indicates the duty cycle output when the DC motor is in the reverse state, and the output value of PWM A is 0 at this time; and when the motor is in the stopped state, as shown in the figure when the Sta value is 1, the output values ​​of PWM A and PWM B are both 0. The simulation timing diagram verifies that this design is effective, and thus generates a PWM function module.
The PWM function module is shown in Figure 4.

The principle of the PWM control function module is as follows: the base frequency signal of the clock source 50MHz is divided by 64 as the base frequency signal of the PWM module, and 256 base frequency pulse signals are used as a cycle of PWM output. The value of Conword given by the NiosII processor specifies the duration of the high level within a PWM cycle. Changing the value of Conword immediately changes the value of the duty cycle output. Sta is used to control the forward and reverse rotation of the motor.
The pin allocation diagram of the PWM control function module is shown in Figure 5.

3 Design of speed measurement function module
The function of the speed measurement module is mainly to use the period of the base frequency to calculate the period of the grating signal and calculate the speed of the DC motor. The flow chart of its design is shown in Figure 6.

The timing simulation waveform of the speed measurement module is shown in Figure 7.
As can be seen from Figure 7, a clock signal Clk is given for timing during simulation, en is the enable signal, which means that the grating is valid, dout indicates the grating effective time, and there are three values ​​of 200, 400, and 700 in the simulation. The timing simulation verifies that the speed measurement module of this design is valid, so it is generated into a speed measurement function module.
The speed measurement function module is shown in Figure 8.

Its working principle is as follows: given a known base frequency, the grating is used as the threshold, the number of base frequency pulses is measured, the period of the grating signal is calculated from the period of the base frequency, and then the speed is calculated. The motor control algorithm is adjusted according to the speed measured by the speed measurement module to achieve the effect of closed-loop control.
The pin allocation diagram of the speed measurement module is shown in Figure 9.

4 Conclusion
According to the functional requirements of the DC motor, the PWM function module and the speed measurement module were designed using the VHDL language, and simulation was performed to verify the correctness of the design and complete the system design. The innovation of this paper is to directly design the control function module using software and hardware. This design has the advantages of short development cycle, good general ability, and easy development and expansion, and is worth promoting.