Design of power supply for embedded single-board computer based on CPCI

1 Introduction

Embedded systems are widely used in the fields of control and communication. These systems run at high speeds and are complex, often integrating ultra-large-scale FPGA devices, DSP devices, DDR memory, and various interface circuits . This places higher demands on the output voltage value, power consumption, voltage accuracy, power-on sequence, and power integrity of the power supply . Here we introduce a design scheme for an embedded single-board computer power supply based on CPCI. This design is mainly used in aviation equipment and military vehicle-mounted equipment.

2 System Power Requirements Analysis and Device Modeling

Figure 1 is a block diagram of the overall system structure. The system consists of a CPU and its connected DDR memory, PCI interface, clock, power supply, EBC bus and external interface circuit. The CPU uses AMCC's PowerPC 440EPx.

2.1 System Power Requirements

The system power supply is relatively complex, with up to 8 different power supply voltage values, of which 5 V and 3.3 V are provided by the CPCI chassis. 5 V is supplied to the DC/DC device to generate other power supply voltages and to power the transformer of the 1553 bus. 3.3 V is the main power supply of the system, including USB PHY, clock devices, FPGA and CPU, and the I/O part of the PCI bridge device (PLX6466). Other power supply voltages are obtained by stepping down 5V or 3.3 V through power supply devices.

Tables 1 and 2 show the power consumption requirements of the CPU and PCI bridge devices respectively. The CPU device has no requirements for the power-on sequence. VDD 1.5 V is the core voltage of PPC440EPx, SOVDD is the DDR2 interface power supply of the CPU; 1.8 V is the core voltage of the PCI bridge, and VDDIO is the interface power supply of the PCI bridge.

The system uses DDR2 as memory, using 4 pieces of Micron's MT47H64M16 with a capacity of 512 MB. The power supply voltage of the core, interface and DLL of each DDR2 device is 1.8 V, and the maximum current is 440 mA. In addition, special attention should be paid to the VREF of DDR2 and the port connection voltage VTT of the address and control signals, whose voltage values ​​are all 0.9 V. Among them, VREF has very strict tolerance requirements (less than 2%), but its current requirements are relatively small. VTT not only has strict tolerance requirements, but also requires it to output or absorb a large current in an instant. At the same time, VREF must change with the change of VDD, and VTT must also track the change of VREF. It is difficult for ordinary LDO to complete such a task, and a dedicated DDR termination power supply device must be used.

The system uses the Spartan3 FPGA device XC3S200 to implement the design of 1553 transceiver and some interface circuits . The device uses three voltages: core voltage VCCINT (1.2 V), auxiliary voltage VCCAUX (2.5 V) and interface voltage VCCO (3.3 V). There is a power-on reset circuit inside the FPGA. The reset signal is released only when the three power signals reach their respective threshold voltages. Therefore, there is no requirement for the power-on sequence of the three power signals. However, if VCCINT is powered on before VCCAUX, several hundred milliamperes of instantaneous current will be added during power-on . The power consumption of FPGA devices can be estimated by using the electronic spreadsheet-based tool XPower Estimator (XPE) or by calling XPower directly under ISE. The system uses XPower software to estimate the power consumption requirements of the design: VCCINT is 50 mA and VCCAUX is 10 mA. The system uses two 88E1111 as the PHY device of Gigabit Ethernet, which uses 2.5 V as the voltage (410 mA) and 1.0 V as the core voltage (250 mA). In addition to the above-mentioned integrated circuits , the system also has circuits such as serial interface, USB interface, clock, etc., but the power consumption is relatively low. From the analysis, it can be seen that: 1.5 V and 1.8 V require the use of high-power power devices, DDR2 power requires a dedicated power device, and other voltages have lower power requirements.

2.2 Power Supply Device Selection

Power devices are mainly divided into two types: linear regulators and DC/DC converters. LDO is a linear regulator mainly used in situations where the input and output voltage difference is small. Its characteristics are: low cost, low noise, low quiescent current, and few external components. However, its conversion efficiency is not very high, and the output current is generally not very large. DC/DC converters have high conversion efficiency, large output current, and low quiescent current. However, due to the use of PWM control, its switching noise is large and the cost is relatively high. In addition, the external circuit is more complicated, and generally requires external switching tubes , inductors, and capacitors . Many new DC/DCs integrate the switching tube into the device. Therefore, only external inductors and filter capacitors are required.

According to the characteristics of power devices and the analysis of system power requirements, both types of power devices are used in this system. However, in order to simplify the design, facilitate mass production and material management, the system only uses three different types of power devices, namely: LT3501, LDO device TPS51100 and TPS74801. Among them, the 1.5 V and 1.8 V power supply circuits with large power consumption requirements are implemented by LT3501; the termination power and reference power of DDR2 are provided by the device TPS51100; and the other power supplies of the system are provided by TPS74801.

[page]3 System hardware circuit design

Due to the simplicity of the LDO circuit and the length of this article, the circuit design of LT3501 is discussed in detail here. Figure 2 is the circuit schematic of LT3501.

3.1 Parameter configuration

3.1.1 Output voltage

The output voltage value is relatively simple to select, and is obtained by dividing the voltage by two resistors connected between VOUT and VFR . The formula is:

In Figure 2, the voltage divider resistors are two resistors R680 and R682 (corresponding to R1 and R2, respectively) with a precision of 1%. Substituting into formula (1), the output voltage VOUT = 1.495 V is calculated.

3.1.2 Switching frequency

The switching frequency of LT3501 is determined by the resistor connected to the RT/SYNC pin, as shown in Figure 3. When the resistance increases from 15.4 kΩ to 133 kΩ, the switching frequency decreases from 1.5 MHz to 250 kHz. In order to reduce the size of the external inductor and capacitor and facilitate PCB design, the switching frequency is selected to be higher f=1.2 MHz. According to the curve shown in Figure 3, the resistance value is 20.6 kΩ.

3.1.3 Inductance

For switching power supplies , the value of the inductor is very important. According to the LT3501 data sheet formula:

In the formula, DC refers to the duty cycle, and its minimum value is DCMIN=tON(MIN)×f=0.24. VD is the forward voltage drop of the capture diode , and its value is about 0.4 V.

If the maximum output current is 3 A, the inductor L can be calculated to be at least 1.2 μH by equation (2).

[page] To improve efficiency and reduce output ripple, the inductor is required to: have an effective value of rated current greater than the maximum load current; at the same time, its saturation current value should be greater than 30%; its DC resistance value should be less than 0.05 Ω, and its inductance value should be greater than the theoretical value. Based on this, the system selects PB03316-1R5MT, which has an inductance value of 1.5μH, a DC resistance of 0.010Ω, an effective value of rated current of 8.0 A, and a saturation current of 6.4 A. After selecting the inductance value, it can be substituted into formula (2) to calculate the ripple current △IL as 0.8 A.

3.1.4 Input Capacitance and Output Capacitance

Since the input of the switching power supply provides current to the output in the form of pulses, and its rise and fall times are very fast.

Therefore, input capacitors are required to filter out voltage ripples to reduce EMI. A 4.7μF or larger X7R or X5R capacitor can be used to bypass the input signal, or a tantalum capacitor and a smaller ceramic capacitor can be used in parallel . The ceramic capacitor should be as close to the input pin of the device as possible.

The output capacitor filters the current flowing through the inductor to obtain an output voltage with very small ripple. At the same time, its energy storage function can also meet the instantaneous load and stabilize the control loop of the LT3501. The control loop of the LT3501 adopts the current mode and has no requirements on the RESR (series equivalent resistance) of the output capacitor.

Therefore, ceramic capacitors can be used as output capacitors. The value of the output capacitor can be estimated according to formula (3). MLS (Max Load Step) is the maximum current load jump, for example: the MLS of this system is 3A.

The output voltage ripple can be estimated by equations (4) and (5): Equation (4) calculates the ceramic capacitor, and equation (5) calculates the tantalum capacitor or aluminum electrolytic capacitor. The system uses X7R ceramic capacitors with good temperature characteristics in parallel with tantalum capacitors. The ripple voltage calculated by equation (4) is about 0.56 mV, which meets the requirements of the CPU and other circuits for power supply ripple.

3.2 PCB Layout

For switching power supplies, the layout of the PCB is very important. When the switching power supply is working, there is a large step current in some branches of the circuit. This current mainly flows between the switch tube inside the device , the external loop diode and the input capacitor. The loop formed by these components should be as small as possible. When laying out, these devices, inductors and output capacitors should be laid out on the same layer of the circuit board, and their connections should be completed on the same layer as much as possible. Under these components, there is a continuous local ground. The connection between this local ground and the system ground adopts a single-point connection method, and the connection point is preferably selected at the ground end of the output capacitor. In addition, the wiring of the SW and BST signals should be as short as possible. The bottom of the LT3501 device has an exposed leadframe, which has good heat dissipation. When designing the PCB. A piece of copper can be placed at the corresponding position on the bottom of the device, and connected to the large area of ​​copper on the inner layer through multiple vias.

4 Conclusion

The power consumption of the system is analyzed, and the power circuit of the embedded system is designed using three power devices on the basis of considering certain redundancy. The MAX705 power monitoring device is used to improve the reliability of the system. The system has been successfully verified in many practical applications and has performed well.