Unipolar PFC flyback switching power supply solution for LED drive power supply

LED driver power supply products above 5W require high power factor, low harmonics, and high efficiency. However, due to volume and cost considerations, the traditional PFC+PWM circuit is complex and costly. Therefore, in low-power (about 65W) applications, unipolar PFC is generally used, especially in T5, T8 and other LED driver power supplies, and has become the current mainstream application solution. There are many PFCs on the market. The following is the LD7591, which is widely used on the market, and its upgraded version LD7830, mainly using LD7830 for explanation.

1. Introduction:

LD7830 is an LED driver chip with power factor correction function. It uses voltage mode control to stabilize the output and achieve high power factor (PF) and low total harmonic distortion (THD) characteristics. LD7830 can be used in a wide input voltage range and maintain extremely low total harmonic distortion. LD7830 has rich protection functions, such as output overvoltage protection (OVP), output short circuit protection (SCP), chip built-in over temperature protection (OTP), Vcc overvoltage protection, open loop protection and other protection functions to make the LED drive power supply system work safer and more reliable. LD7830 adds high voltage startup, OLP protection function and soft start function on the basis of LD7591, making the system's standby power consumption lower to below 0.3W, and short circuit protection is more reliable.

2. LD7830 Features:

Built-in 500V high voltage starting circuit

High PFC Function Controller

Efficient Transition Mode Control

Wide range UVLO (16V on, 7.5V off)

Maximum operating frequency 250KHZ

Built-in VCC overvoltage protection

Built-in overload protection (OLP) function

Over current protection (OCP) function

500/-800mA drive capability

Built-in 8ms soft start

Built-in over temperature protection (OTP) protection

Three application scopes:

AC/DC LED lighting driver applications

Adapter below 65W

4. Typical Applications

Figure 1

5. System Design

The typical application of LD7830 is the flyback topology, as shown in Figure 1.

5.1 Let us first introduce the flyback working principle of LD7830. Assuming that the AC input voltage waveform is an ideal sine wave and the rectifier bridge is also ideal, the instantaneous value of the input voltage Vin(t) after rectification can be expressed as:

Where VPK is the peak value of the AC input voltage, VPK=√2×VRMS, Vrms is the effective value of the AC input voltage, and FL is the frequency of the AC input voltage. Assuming that the output VCOMP of the LD7830 error amplifier is a constant value within half an AC input voltage cycle, the instantaneous value of the primary inductor current peak value IPKP(t) is:

Where IPKP is the maximum value of the primary inductor current peak relative to the input voltage.

In the flyback circuit, when the MOSFET is turned on, the input voltage Vin(t) charges the inductor, and the output capacitor discharges the load. The primary inductor current starts to rise from zero. Let θ=2×π×FL×t:

Ton is the MOSFET on-time, Lp is the primary inductance. It can be seen from the above formula that TON has nothing to do with the phase.

Assuming the transformer efficiency is 1 and the windings are fully coupled, when the MOSFET is turned off, the secondary inductor charges the output capacitor and discharges to the load, then:

Where, TOFF is the MOSFET turn-off time, IPKS(θ) is the instantaneous value of the secondary peak current, Ls is the secondary inductance, Vout is the output voltage, VF is the forward voltage drop of the output rectifier, n is the primary-secondary turns ratio, and TOFF changes with the instantaneous value of the input voltage.

The working current waveform is shown in Figure 2. It can be seen that within half an input voltage cycle, as long as TON is controlled to be fixed, the inductor current peak follows the input voltage peak with the same phase, achieving a high power factor PF.

Figure 2

5.2 The following will introduce the relevant parameter design process for the flyback topology structure

5.2.1 First, determine the target parameters according to the actual application, such as the minimum AC input voltage Vinmin, the maximum AC input voltage Vinmax, the AC input voltage frequency FL, the output voltage Vout, the output current Iout, the maximum double frequency output voltage ripple ΔVo, etc. Then, pre-design the system parameters according to the target parameters, and first estimate the conversion efficiency η to calculate the maximum input power of the system; the maximum input power Pin can be expressed as:

Then determine the minimum operating frequency of the system. The switching frequency of LD7830 is a variable, expressed as:

The minimum switching frequency Fsw-min occurs at the sine peak of the minimum input voltage. In system design, the minimum switching frequency Fsw-min is generally set at 35kHz or higher.

Determine the transformer reflected voltage VOR. The reflected voltage is defined as: VOR=n(Vout+Vf). The value of VOR affects the selection of MOSFET and secondary rectifier and the design of the absorption circuit.

5.2.2 Transformer Design

First, determine the primary inductance. The size of the inductance is related to the determination of the minimum switching frequency. The minimum switching frequency occurs when the input voltage is minimum and full load. The formula is derived as follows:

Where Ko is defined as the ratio of the input voltage peak to the reflected voltage, that is,

Generally speaking, the larger the Ko, the lower the PF value will be and the higher the total THD% will be.

After determining the primary inductance LP, it is time to select the transformer core. You can refer to the formula AP=AE×AW to select it. Then, based on the selected core, determine the minimum number of primary windings Npmin to avoid transformer saturation. Refer to the formula:

Then determine the number of turns of the secondary winding, and the primary-secondary turns ratio is determined by VRO:

Similarly, the number of turns of the Vcc winding can be derived based on the Vcc voltage defined in the specification. The typical value of Vcc for LD7830 is set at 16V.

definition:

LP: Primary inductance

NP: Primary turns

IPKP: Primary peak current

BM: Maximum flux saturation density

AE: Core cross-sectional area

Po: output power

5.2.3 Primary absorption circuit design

When the MOSFET is turned off, due to the existence of the transformer leakage inductance, a voltage spike will appear at the drain end of the MOSFET. Excessive voltage applied to the D pole of the MOS tube will cause MOS breakdown and affect EMI, so an absorption loop must be added to limit the leakage inductance spike voltage. A typical RCD absorption loop is shown in Figure 3:

Figure 3

The working principle of the RCD circuit is: when the drain voltage of the MOSFET is greater than the cathode voltage of the absorption circuit diode D1, the diode D1 is turned on, absorbing the leakage current and thus limiting the leakage peak voltage. In the design, the voltage Vsn across the buffer capacitor C1 should be set 50-100V higher than the reflected voltage VRO, as shown in Figure 4, which is called the leakage voltage ΔV. Vsn cannot be designed too low, otherwise it will increase the power consumption of the RCD absorption circuit. The design of the buffer capacitor C1 is based on energy balance.

Figure 4

IPKPMAX is the maximum value of IPKP in the full voltage range. The buffer capacitor C1SN needs to withstand large current spikes, which requires its equivalent series resistance ESR to be very small. R1 selects the appropriate W number according to power consumption, and the resistance value is generally between 47K-120K.

The absorption loop diode D1 is usually a fast recovery diode, and the conduction time is also required to be fast. The reverse breakdown voltage is required to be greater than the breakdown voltage BVDSS of the selected MOSFET. Generally, a fast recovery diode with a rated current of 1A is selected as the absorption loop diode in applications below 65W.

5.2.4 Selection of MOS tube

The maximum drain current IDMAX of the switching tube MOSFET should be at least 1.5 times greater than the peak current IPKP flowing through the switching tube. The drain-source breakdown voltage of the MOSFET (refer to Figure 4) BVDSS should be greater than the sum of the maximum input voltage, VOR and the spike caused by leakage inductance. Generally, a margin of at least 90% should be left.

5.2.5 Selection of secondary rectifier tube

Considering a certain margin, the maximum reverse voltage VRM of the secondary rectifier tube D must meet the following requirements:

Because the secondary rectifier diode of the flyback switching power supply will only conduct when the power supply is Toff, the output must be able to withstand the allowable value of the entire output current when it is turned on. The minimum forward conduction peak current required by the output diode is:

Dmax is the duty cycle. If Dmax is set to 0.5, Ifps>4Iout

5.2.6 Selection of output capacitor

The output capacitor voltage usually presents two kinds of ripples. One is caused by high-frequency output current, which is mainly related to the equivalent series resistance (ESR) of the output capacitor. The other is low-frequency ripple. In order to obtain a higher PF value, the loop bandwidth is usually narrow, so the output inevitably has a larger ripple of twice the input voltage frequency, and its value is related to the size of the capacitor. Generally speaking, when the low-frequency ripple meets the requirements, the high-frequency ripple can be ignored because the capacitor equivalent ESR is small enough. The capacitance of the capacitor can be selected by referring to the specifications of each manufacturer (generally high-frequency low-resistance type is selected), and the appropriate capacitor series model is selected according to the actual operating temperature, voltage and MTBF of the product.

5.2.7 Selection of IC main peripheral parameters

5.2.7.1 Selection of Typical Parameters for Maximum On-Time

Figure 5

5.2.7.2CsPin parameter selection

R1 and C1 are filters used to filter out surges.

R1: 100~300

C1:100PF~470PF

Figure 6

5.2.7.3 RZCD parameter selection

Figure 7

6. Practical application example of 24V0.7A using LD7830 and LD8105

6.1. Circuit:

Figure 8

6.2. Actual test related parameters:

6.2.1 No-load power consumption is 0.29W at input AC264V, lower than 0.3W

Figure 9

6.2.2 Efficiency and PF value curve

Figure 10

6.2.3CV-CC curve and description

The LED lighting driver must be controlled in constant current CC mode and constant voltage CV mode. As the forward voltage drop of the LED decreases as the temperature of the welding surface increases, the current of the LED will increase, causing the temperature to rise, which will reduce the life of the LED and may even cause damage to the product. Therefore, referring to the circuit in Figure 8, the secondary part uses LD8105 for CV/CC mode control. LD8105 is a high-precision CV/CC mode control IC. Compared with other similar ICs, it has the characteristics of low current detection voltage, wide Vcc input voltage, and small working current, which can improve the efficiency and application range of the entire system.

Fig.11

The purpose of this article is to provide a basic design reference for developers who are designing similar circuits or those who are preparing to design with similar circuits. I hope that some of the experience in this article can help everyone.