1 Main components of the system
1.1 C8051F021 MCU
This system uses the C8051F021 SOC microcontroller with excellent performance and low cost as the control core. C8051F021 is a fully integrated mixed-signal system-level MCU chip with 32 digital I/O pins. Its main internal resources include 8-channel 12-bit ADC, 2-channel 12-bit DAC, 4 KB RAM, 64 KB FLASH, and hardware-implemented SPI, SMBus/I2C and two UART serial interfaces. In addition, there are clock oscillators, watchdog timers, VDD monitors, temperature sensors, etc.; all analog and digital peripherals of C8051F021 can be enabled/disabled and configured by IDE software. It uses the CIP-51 microcontroller core compatible with 8051. Due to the pipeline structure, its instruction execution speed has been greatly improved. In addition, C8051F021 is also equipped with a standard JTAG interface, which can be used to perform non-intrusive, full-speed, in-system debugging of the MCU installed on the final product with the support of IDE software. The C8051F021 is packaged in TQFP-64 and can operate at a voltage of 2.7 to 3.6 V over the industrial temperature range (-45°C to +85°C).
1.2 RA8835 LCD control chip
RA8835 is a new version of LCD control chip launched by Taiwan Ruiyou Technology Co., Ltd. It contains powerful I/O buffer. RA8835 has rich instruction functions and uses four-bit data parallel transmission. It can support mixed display of text and graphics, and can present dynamic effects such as three-layer overlapping display of text and graphics, horizontal and vertical scrolling on the LCD screen. RA8835 can support a screen display resolution of up to 640×256. It has an internal integrated Mask ROM that can support 160 5×7 pixel characters, and can also be connected to CGRAM to support 64 8x16 pixel characters, or external CGROM to support 256 8×16 pixel characters. RA8835 is fully compatible with EPSON's S1D13305 (SED1335) chip, and has enhanced stability. It has the advantages of newer process and lower power consumption, which can effectively reduce costs.
The interface of RA8835 has a powerful I/O buffer, which is mainly manifested in two aspects:
First, when MCU accesses RA8835, it does not need to judge whether it is "busy". RA8835 is ready to accept the access of MCU at any time, and can timely transmit the instructions and data sent by MCU under the internal timing:
Secondly, the RA8835 has two operation timing circuits in the interface part that are compatible with the Intel 18080 series MCU and the M6800 series MCU, and one of the two can be selected by setting the pin level. The pins of the RA8835 interface part are as follows:
DB0~DB7: tri-state data bus, can be directly connected to the data bus of MCU;
CS: chip select signal, low level is effective, when MCUI accesses RA8835, it should be set low;
RD: when it is 8080 interface, this pin is read operation signal;
when it is M6800 interface, it is enable signal;
WR: when it is 8080 interface, this pin is write operation signal;
when it is M6800 interface, it is write operation signal;
A0: I/O buffer selection signal, when A0 is 0, write data parameters and read busy flag, when A0 is 1, write instruction code and read data;
RES: reset signal, low level is effective, when restarting RA8835, it is also necessary to use instruction SYSTEMSET.
SEL1, SEL2: type selection signal of interface.
2 LCD screen circuit design
This system uses the MST-G320240DBSW-213W-E 5.7-inch LCD display module produced by Hong Kong Truly Corporation, which can display 320x240 dots, has a blue film high brightness, LED backlight, onboard 5 V negative voltage, and RA8835 control chip. Its LCD screen interface circuit is shown in Figure 1.
In Figure 1, AD0~AD7 can be directly connected to the data/address bus of C8051F021 (with 5 V pull-up, the I/O pins of C8051F021 are all 5 V resistant); RD and WR are read and write lines, respectively, which can be connected to the read and write ports of C8051F021 (RD: pin 49, WR: pin 48; both with 5 V pull-up); RST is power-on reset, which can be connected to the power-on reset circuit; CS-LCD is the chip select input; A0 is the I/O buffer selection. In order to avoid the LCD backlight being always on when there is no operation, reduce system power consumption, and extend the service life of the LCD, this system uses the 555 circuit to design a LCD backlight control circuit with a fixed delay off of the backlight. This circuit uses LM555H to build a monostable circuit. When there is a trigger pulse at the BLC end connected to the C8051F021 I/O port, the output end TC of the 555 monostable circuit will output a high-level pulse of a certain length. At this time, the T1 tube is turned on, and the LCD backlight is turned on. After a fixed delay period, the 555 output end TC turns to a low level, the T1 tube is cut off, and the LCD backlight is turned off. According to the calculation formula of the output pulse width of the 555 monostable circuit, the appropriate component parameters can be selected. Usually when the delay is set to 30 seconds, the resistor R7 can be selected as 100 kΩ and the capacitor C21 can be selected as 330μF. In engineering projects, sometimes due to actual needs, the system also needs to expand the real-time clock chip DS12887 and the memory chip CAT28C256. The interface of these two and the LCD screen interface can share the data/address bus of C8051F021 as the data bus. The chip select circuit with 74HC139 as the core given in this design is shown in Figure 2, and its corresponding address is as follows:
LCD: 2000H~2001H
DS12887: 4000H~40FFH
C AT28C256: 8000H~FFFFH
The CAT28C256 in this system occupies the A0~A14 address bus separately, while A15, A14, and A13 are used as the decoding input signal lines of 74HC139, and A0 is used as the I/O buffer selection of the LCD screen. Since the external MEM low port multiplexing method is adopted, this system also designs an address latch circuit with 74HC573 as the core, and its circuit is shown in Figure 3. Among them, AD0~AD7 can be connected to the data/address bus of C8051F021, and ALE is connected to the ALE end (pin 50) of C8051F021.
3 System Software Design
When designing software, the driver of RA8835 can be designed according to the internal registers of RA8835. The control part of RA8835 is the core of RA8835. It consists of several parts such as oscillator, functional logic circuit, display RA management circuit, character library management circuit and timing generator for generating driving timing. Its oscillator can work in the range of 1 to 10 MHz. RA8835 can quickly interpret the instruction code sent by MCU at a very high operating frequency, and put the parameters into the corresponding registers, and will also trigger the corresponding logic function circuit. The control part can manage 64 KB display RAM, built-in character generator and external character generator CGRAM or EXCGROM. Generally, RA8835 can divide 64 KB display RAM into the following two display characteristic areas:
(1) Text display feature area
The display RAM area with this feature is dedicated to text display, and each byte of data accessed in this area is considered a character code. RA8835 can use the character code to determine the location of the character in the character library, and then transmit the corresponding font data to the LCD display module, and the 8x8 dot matrix block of the character appears on the LCD screen, that is, one byte in the text display RAM area corresponds to 8x8 dot matrix on the LCD screen.
(2) Graphic display feature area
The display RAM area with this feature is dedicated to graphic display. Each byte of data accessed in this area will be sent directly to the LCD display module. The level state of each bit determines the display state of a point on the LCD screen. "1" means display, and "0" means no display. Therefore, one byte in the graphic display RAM area corresponds to the 8×1 dot matrix on the LCD screen.
RA8835 has a set of special registers to manage these two characteristic display areas. It can display one characteristic area separately, or combine the two characteristic display areas through a certain logical relationship. The display mode can be set through software command settings. RA8835 has 13 instructions, most of which have parameters. The parameter values can be set by the user according to the characteristics of the controlled LCD display module and the display needs.
The MCU can write the instruction code into the instruction input buffer (i.e. when A0=1), and the instruction parameters are then written into the data input buffer (i.e. when A0=0). One of the functions of the instruction code with parameters is to select the register of the corresponding parameter. Any instruction (except SLEEPIN, CSRDIR, CSRR and MERAD) can only be executed after the input of its attached parameters is completed. When writing a new instruction, RA8835 generally waits for the arrival of new parameters after the old instruction parameter group is completed.
The timing of RA8835 in 8080 mode is shown in Figure 4. Figure 5 shows the driver program flow chart of RA8835.
4 Conclusion
This paper discusses the design method of LCD display system based on C8051F021 single chip microcomputer and RA8835 LCD controller. The specific interface circuit for effective control of the module is given. The system has been proven to have stable performance and simple design through engineering tests. It can also provide a reference method for the design of related LCD display systems.
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