Analysis of the impact of power switches on power supply efficiency

High frequency switching power supply operation (electronics) allows the use of small passive components, hard switching mode will lead to increased switching losses, in order to reduce high frequency switching losses, industry development soft switching technology, load resonance technology and zero voltage switching technology are widely used. Here is the load resonance technology using the resonant characteristics of the capacitor and inductor across the antenna during the switching period, the switching frequency as the input voltage and current change.

The change of switching frequency, such as pulse frequency modulation (PFM), brings many difficulties to the design of electronic filter input. Because there is no inductor for filtering, the output voltage at both ends of the output voltage can be applied to the rated voltage diode selected by the designer. However, when the load current increases, the loss of inductance and capacitance is lacking, and the load resonance technology is not suitable for high output current and low voltage. On the other hand, the voltage conversion technology uses a parasitic composition that only switches the resonant characteristics of the antenna when the circuit is turned on and off. One of the benefits of using these technologies is that parasitic components, such as the leakage inductance and capacitance of the main transformer, are eliminated, and the output is realized without adding more external components to achieve soft opening. In addition, the application of technology has a fixed switching frequency pulse width modulation technology, so these technologies are easier to understand, analyze and design based on load resonance technology.

Crazy PWM half-bridge inverter is a most common topology because of its symmetry with simple configuration and zero voltage switching (ZVS) characteristics, which uses ZVS technology. Not only that, unlike load resonant converter, LLC topology asymmetric half-bridge inverter has type inductor, its output current output pulsation is small and can be controlled by appropriate output capacitor. Due to the analysis and design, and output power inductor, asymmetric half-bridge inverter is usually used for PWM high output current and low voltage applications, such as computer and server power supply. In order to better handle the output current, synchronous rectifiers are often used in the secondary, because the transmission loss can replace the resistance loss of diodes. Compared with LLC converter, it is more convenient to realize synchronous rectifier drive for asymmetric half-bridge inverter. In addition, the utilization rate of the main transformer is increased, which is a common solution for high power flow. This crazy current amplifier and synchronous rectifier asymmetric half-bridge inverter and common features of the example, some experimental results, samples for asymmetric topology power switch control. Crazy current amplifier and synchronous rectifier asymmetric half-bridge inverter advantages, from low to high voltage and current output current, application of a wide range of applications increased exponentially. Figure 1 shows a current multiplier in the secondary of a symmetrical half-bridge inverter PWM. The secondary coil is a single structure and the output inductor can be divided into two smaller inductors. In order to improve the overall efficiency, the use of relational database (RDB) devices constitutes a synchronous rectifier, synchronous rectifier (SR). Compared with the traditional center-shunt type (center), there are many advantages to the configuration of the tapped current multiplier: First, the DC excitation current component is less than or equal to the center-shunt type DC component, and the configuration can use a small core transformer. When each output inductor current is loaded, it bears half of the center-digging type excitation current shape is similar.

If the output data of the inductor current load bears imbalance, the excitation current will also be reduced. Secondly, the square root of the coil current (root-mean-square) - for this type of configuration, the center almost half of the load current flows through each output inductor. In view of this, the secondary coil current density is low, you can all use the same magnetic field and the same wire specifications to see it again. Third, the body is a simple solution center is particularly noteworthy because of the transformer line code restrictions, can be used in many applications output. Fourth, we can more conveniently and effectively grid the output signal for the SR inductor coil ratio, due to the ratio of the first and second coils of the transformer, but only small enough for the output of the appropriate inductor, such as the grid voltage easily 20V 10 volts between the voltage. In addition, the independent output will reduce the cost of the inductor magnetic greater burden. In view of the above advantages, the current multiplier high output current is one of the most commonly used topologies.

Figure 1 Asymmetric PWM half-bridge converter using current doubler

[page] How the proposed converter works

As shown in Figure 2, starting from power supply mode 2, since S1 is turned on, Vin-VCb is applied to the primary side of the transformer, and the excitation current im increases with a slope of (Vin-VCb)/Lm. Since SR2 is turned off, the current slope of LO1 is determined by (Vin-VCb)/n minus the output voltage. On the other hand, the current of LO2 decreases with a slope of –VO/LO2, which is the free-wheeling through SR1. When the two output inductors share the load current, SR1 bears the entire load current. The secondary winding of the transformer only handles iLO1, so iLO1/n is the current reflected to the primary side of the transformer, which is superimposed on the excitation current to form the primary current ipri. In practice, due to the phenomenon of leakage inductance, vT2 is slightly lower than the value shown in Figure 2, but we will ignore this situation in this section to simplify the analysis.

Figure 2 Operation analysis of the proposed converter

When S1 is turned off, mode 3 begins. Since the output capacitance of S2 is discharged, vT1 also decreases. Finally, it becomes zero when the voltage of the output capacitance of S2 is equal to VCb. At the same time, since the reverse bias voltage of SR2 is eliminated, its body diode turns on and conducts. Then, the two SRs are turned on together in this mode. The body diode of S2 is turned on after the output capacitance of S2 and the output capacitance of S1 are completely discharged. Since both SRs are turned on, iLO1 and iLO2 are both freewheeling, with slopes of –VO/LO1 and –VO/LO2, respectively, and vT1 and vT2 are both zero. Since VCb is only applied to the leakage inductance, it causes the polarity of the primary current to change rapidly. After the body diode of S2 is turned on, S2 is turned on, thereby achieving ZVS operation of S2. The duration of this mode is

(1)

[page] Mode 4 is another charging mode, which starts at the end of the commutation between each SR. The voltage applied to the primary side of the transformer is –VCb, so the excitation current decreases at a slope of –VCb/Lm, and the slope of iLO2 is (VCb/n-VO)/LO2. The remaining inductor current is the freewheeling current through SR2. It can be seen from Figure 2 that the large ripple current of each output inductor is eliminated due to the out-of-phase effect. Therefore, it can use two smaller inductors in the current multiplier configuration compared to the center-tapped or bridge rectifier configuration.

When S2 is turned off, mode 1 starts as another rebuilding mode. The operating principle of mode 1 is almost the same as that of mode 3, except for the ZVS condition. In mode 1, vT1 becomes zero at the moment when the output capacitor voltage of S1 is equal to Vin-VCb. Before this moment, the load current on the output inductor LO2 is reflected to the primary side of the transformer, which helps to achieve the ZVS operation of the switch. In contrast, the energy stored in the leakage inductance discharges and charges the output capacitor only after this moment. Therefore, the ZVS operation of S1 is more stable than that of S2 because Vin-VCb is usually higher than VCb. Apart from this, it can be analyzed in the same way as mode 3. The duration of mode 1 is

(2)

Use equations (1) and (2) to calculate the output voltage in detail

(3)

VSR is the voltage across the MOSFET when SR is in charging mode.

The DC and ripple components of im can be obtained from the following equations:

(4)

(5)

Here, ILO1 and ILO2 are the DC components of the output inductor current.

Design Example and Experimental Results

In this section, a design example is discussed. The target system is a PC power supply with an output voltage of 12V and an output load current of 30A. Since the input usually comes from a power factor correction (PFC) circuit, the input voltage range is not wide. The target specifications are as follows:

Nominal input voltage: 390 VDC

Input voltage range: 370 VDC ~ 410 VDC

Output voltage: 12 V

Output current: 30A

Switching frequency: 100 kHz

Figure 3 Design example of a 360 W PC power supply (12 V, 30 A)

Figure 3 shows the complete schematic of the reference design and Table 1 shows the electrical characteristics of the transformer.

[page]Table I Electrical characteristics of the designed transformer

Figures 4 and 5 show the experimental waveforms of the converter at nominal input and full load. The gate signal of S1, the voltages on the primary and secondary sides of the main transformer, and the primary current are shown in Figure 4. Note that these waveforms agree well with the theoretical analysis, including ZVS operation. The output inductor current and the SR current are shown in Figure 5. Due to the duty cycle and parasitic components, the output inductor current is unbalanced, which means that the average excitation current is less than the center-tapped configuration (Note 1).

Figure 4 Experimental results I

Figure 5 Experimental results II

[page] Figure 6 shows the ZVS operation at different load conditions, showing the drain voltage and gate signal of the low-side switch. The converter still exhibits ZVS operation at loads as low as 30%.

Figure 6 ZVS operation verification; (a) 30% load; (b) 20% load condition

Figure 7 Measured efficiency

The efficiency of the converter is shown in Figure 7, with efficiencies measured at 20%, 50%, and 100% of rated load being 93.7%, 94.6%, and 93.1%, respectively, showing marginal performance, but 85 PLUS specifications are achievable with a well-designed PFC and DC-DC stage.