How to Reduce Power Consumption in Mobile Designs

This article will explore how mixed voltage levels increase ICC supply current and how logic gates reduce power consumption in mixed voltage powered mobile designs. Current mobile designs are struggling to balance power-rich functionality with the need for longer battery life.

Currently, most portable devices have multiple power rails, but variable power consumption may still occur when the input high level (VIH) is lower than the power supply voltage (VCC). When the input voltage is at the power rail level (VIL = GND or VIH = VCC), CMOS generally has very low static ICC and leakage current, making it the preferred technology for logic devices in mobile applications. However, if VIH

Typically in CMOS gate designs, the input voltage threshold or input switching point is VCC/2; however, Fairchild Semiconductor's low ICCT gates use a proprietary input voltage design that reduces the input threshold voltage and increases the input voltage range without affecting the effective logic low level VIL. As mentioned earlier, CMOS gates consume very little power when the input voltage is 0V or VCC, and the product data sheet usually states the ICC under this condition. Therefore, system designers may be surprised to see an increase in ICC current when the VIH value is less than VCC. Figure 2 below shows the benefits of a redesigned input structure. The VIN-ICC curve shown in Figure 2 compares a standard CMOS input device and a low ICCT input device. Static power is determined by the basic DC power formula: P = ICC × VCC. In this example, with an input VIH of 2.5V, the power dissipation of the standard CMOS gate input equals 3.0mW (3.6V × 0.83mA), while the power dissipation of the low ICCT gate is only 0.003mW (3.6V × 0.99uA); that is, the static power consumption is reduced by 100% by using the low ICCT device.

The increase in ICC current is very important because it will significantly increase the static power consumption of the device. Fairchild Semiconductor's proprietary low ICCT input structure can limit the range of ICCT current during its occurrence, as shown in Figure 2.

Table 1 compares the ICCT supply current levels under different VCC/VIN conditions. As can be seen from the table, Fairchild Semiconductor's low ICCT gate circuit has great energy saving potential. In mixed voltage systems, the power consumption associated with logic gate circuits can be reduced to negligible by using low ICCT gate circuits.

Table 2 shows the availability of low ICCT gates. Additional functionality is available as needed. When existing applications experience excessive power consumption due to the input conditions discussed previously, the user can easily drop in a replacement using the standard pinout.

延长电池寿命的要诀是降低各级的功率。随着便携设备整合更多的功能，功耗问题越来越令人担忧。飞兆半导体的NC7SVL低ICCT TinyLogic产品为解决这些难题提供了一个具成本效益的解决方案。此外，飞兆半导体先进的小尺寸MicroPak封装技术，以及新推出的更小的1.0x1.0mm MicroPak 2封装技术，可显著降低线路板空间要求。

For portable applications with tight power budgets, increased power consumption is unacceptable. The NC7SVL low ICCT gate circuit can help system designers stay within the power budget and extend battery life.

Figure 1: Logic gate and input voltage conditions. When the input voltage is equal to the power supply voltage Vcc, it is the ideal state for using CMOS gate circuits. At this time, the ICC current is extremely low. In the case of mixed voltage, if Vin

Figure 2: ICC-VIN input curve (Vcc=3.6V, VIN=2.5V).

Table 1: Energy saving potential under different VIH conditions.

Table 2: Fairchild Semiconductor's NC7SVL low ICCT gate circuit.