Simulation Study of Three-Level Buck-Boost Bidirectional Converter-EEWORLD

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Bidirectional DC/DC converters have the ability to flow energy in both directions and are widely used in high-voltage DC power distribution systems of more electric aircraft [1][2], UPS systems [3], solar power generation systems [4], and battery charging/discharging systems. Therefore, the research on bidirectional DC/DC converters has become more and more extensive and in-depth.

In 1981, Professor Akira Nabae proposed a three-level inverter [8], which attracted widespread interest due to its low switch tube voltage stress. In 1992, Professor Pinheiro proposed a three-level zero-voltage switching PWM DC converter (TL ZVS PWM converter) [5] based on the advantages of three-level converters. In 2002, Professor Ruan Xinbo used two basic three-level units to derive the three-level topology of all basic DC converters [6]. However, the existing three-level DC converters still have the following shortcomings: (1) the energy of the converter flows in one direction, and (2) the converter is complex to implement soft switching [7]. This paper presents two types of three-level buck-boost bidirectional converter (TL buck-boost BDC) circuit topologies, namely, input-output common ground type and input-output non-common ground type, and their interleaved complementary control schemes; analyzes the steady-state working principle, summarizes the advantages and disadvantages of the converter, and points out that all switches automatically achieve ZVS in the inductor current interleaved change mode, laying a theoretical foundation for further research in the future.

1 Steady-state principle of TL buck-boost BDC with common input and output

Figure 1 (a) shows a TL buck-boost BDC with common input and output, where Cblock is a DC blocking capacitor, and its voltage is half of the voltage U1 at port 1 in steady state. Q1, Q2, Q3, and Q4 are four switches, D1, D2, D3, and D4 are their body diodes, Lf is a filter inductor, and Cf1 and Cf2 are filter capacitors.

Before analyzing the working principle, the following assumptions are made:

1) All switches, diodes, inductors, and capacitors are ideal devices;
2) Cblock can be regarded as a voltage source with a voltage of U1/2;
3) The two-port capacitors are large enough and are equivalent to voltage sources U1 and U2.

In this converter, the reasonable selection of the control scheme is very critical. The scheme selected in this article is based on the following considerations: If Q1 and Q4 are turned on at the same time, U1, Q1, Cblock, and Q4 will form a loop. Because U1 Ucblock, a large current will appear in the loop, which is not desirable; similarly, Q2 and Q3 cannot be turned on at the same time. Therefore, the four switches in this converter adopt the following interlaced complementary drive signals: Q1 and Q4 drive signals are complementary, and Q2 and Q3 drive signals are complementary; Q1 and Q2 work in an interlaced manner, and the drive signals differ by 180°; Q3 and Q4 work in an interlaced manner, and the drive signals differ by 180°.

1.1 Steady-state working principle

In steady-state operation, the converter working mode is different for different duty cycles (D<0.5, D=0.5, D>0.5). Under the same duty cycle, when the inductor current iLf is always greater than zero, changes alternately, or is always less than zero, the working conditions of the converter are also different. Therefore

According to the difference between the duty cycle D and the inductor current iLf, the converter has 9 working modes, as shown in Table 1. Here, three typical modes under D>0.5 (D<0.5, the working conditions of D=0.5 are similar to the analysis method and conclusion of D>0.5, and will not be repeated in this article due to space limitations) are selected for analysis, and the main principle waveforms are shown in Figure 2. When the inductor current iLf passes through zero, the converter has a total of 8 switching modes in one switching cycle, as shown in Figure 3. When the inductor current is always greater than zero and always less than zero, the working modes of the converter are four of the 8 working modes when the inductor current passes through zero, as shown in Figure 2.

1.1.1 Analysis of the working mode in which the inductor current is always greater than zero

1) Switching mode 1 [t0, t2] [Figure 3 (2)]

Before t0, the inductor current iLf flows from A to U2 (defined as the positive inductor current direction) through Q2, Cblock, and D4. At t0, Q4 is turned off, Q1 is turned on, and iLf flows through Q1 and Q2. The voltage between AB is U1, and the voltage on Q3 and Q4 is U1/2. iLf increases linearly.

2) Switching mode 2 [t2, t4] [Figure 3 (3)]

At t2, Q2 is turned off, Q3 is turned on, iLf flows through Q1, Cblock, and D3, Cblock is charged, the voltage between AB is U1/2, and the voltage on Q2 and Q4 is U1/2. The inductor current iLf decreases linearly.

3) Switching mode 3 [t4, t6] [Figure 3 (6)]

At t4, Q3 is turned off, Q2 is turned on, iLf flows through Q1 and Q2, the voltage between AB is U1, and the voltage on Q3 and Q4 is U1/2. The current in the inductor iLf increases linearly. This switching mode is the same as switching mode 1.

4) Switching mode 4 [t6, t8] [Figure 3 (7)]

At t6, Q1 is turned off, Q4 is turned on. iLf flows through D4, Cblock, Q2, Cblock discharges, the voltage between AB is U1/2, and the voltage on Q1 and Q3 is U1/2. iLf decreases linearly. At

t8, Q4 is turned off, Q1 is turned on, and the next cycle begins.

It can be seen that when the inductor current is always greater than zero, the energy flows from port 1 to port 2, and the converter works in buck mode; the output voltage U2=DU1, and the voltage stress of each switch tube is U1/2, which is half of the corresponding two-level converter.

1.1.2 Working mode analysis of inductor current always less than zero

When the inductor current is always less than zero, similar to the inductor current always greater than zero, the topology also has four switching modes in one cycle, from (1)→(4)→(5)→(8)→(1) in Figure 3. Energy flows from port 2 to port 1, and the converter works in boost mode; the output voltage U2=DU1, and the voltage stress of each switch tube is also U1/2.

1.1.3 Working mode analysis of alternating inductor current

1) Switching mode 1 [t0, t1] [Figure 3(1)]

Before time t0, iLf flows in reverse through D2, Cblock, and Q4. At t0, Q4 is turned off, iLf continues to flow through D1 and D2, Q1 is turned on with zero voltage, the voltage between AB is U1, and the voltage on Q3 and Q4 is U1/2. iLf decreases linearly, as shown in Figure 2.

Figure 2 Main principle waveforms under D>0.5

2) Switching mode 2 [t1, t2] [Figure 3(2)]

At t1, the reverse iLf drops to zero and increases positively through Q1 and Q2, and D1 and D2 are turned off. The voltage between AB is still U1, and the voltage on Q3 and Q4 is U1/2.

3) Switching mode 3 [t2, t3] [Figure 3(3)]

At t2, Q2 is turned off, iLf flows through Q1, Cblock, and D3, and Q3 is turned on with zero voltage. Cblock is charged, the voltage between AB is U1/2, and the voltage on Q2 and Q4 is U1/2. The forward iLf decreases linearly.

4) Switching mode 4 [t3, t4] [Figure 3(4)]

At t3, the forward iLf drops to zero and increases negatively through D1, Cblock, and Q3, and D3 is turned off. Cblock is discharged, the voltage between AB is U1/2, and the voltage on Q2 and Q4 is U1/2.

5) Switching mode 5 [t4, t5] [Figure 3 (5)]

At t4, Q3 is turned off, D1 and D2 continue to flow, Q2 is turned on with zero voltage, the voltage between AB is U1, and the voltages on Q3 and Q4 are U1/2. The reverse iLf decreases linearly. This switching mode is the same as switching mode 1.

6) Switching mode 6 [t5, t6] [Figure 3 (6)]

At t5, the reverse iLf drops to zero and increases positively through Q1 and Q2, and D1 and D2 are naturally turned off. The voltage between AB is U1, and the voltages on Q3 and Q4 are U1/2. This switching mode is the same as switching mode 2.

7) Switching mode 7 [t6, t7] [Figure 3 (7)]

At t6, Q1 is turned off, iLf flows through D4, Cblock, Q2, Q4 is turned on with zero voltage, Cblock is discharged, the voltage between AB is U1/2, and the voltage on Q1 and Q3 is U1/2. The forward iLf decreases linearly.

8) Switching mode 8 [t7, t8] [Figure 3 (8)]

At t7, the forward iLf drops to zero and increases in the reverse direction through D2, Cblock and Q4, and D4 is turned off. Cblock is charged, the voltage between AB is U1/2, and the voltage on Q1 and Q3 is U1/2. iLf increases linearly. At t8,

Q4 is turned off, Q1 is turned on, and the next cycle begins.

From the above analysis, it can be seen that when the inductor current changes alternately, all switch tubes are zero voltage switches, the diodes are naturally turned off, and there is no reverse recovery current.

1.2 Basic Relationship

In steady state, the inductor voltage volt-second product balances, and UCblock=U1/2, which is consistent with the assumption 2) before the principle analysis. During startup, Cblock has a voltage building process, and Q1 and Q4 have instantaneous overvoltage, which means that there is a problem of uneven stress on the switch tube during startup. A reasonable solution must be found in future research.

The voltage relationship between U2 and U1 is:

(1)

The pulsation of the inductor current iLf is:

Among them, Ts = 1/fs is the switching period, fs is the switching frequency; Ton is the on-time of the switch tube, and Toff is the off-time of the switch tube. D = Ton/Ts is the duty cycle; △ILf, ILfmin and ILfmax are the inductor current ripple value, the minimum value and the maximum value of the inductor current respectively.

2 Steady-state principle of TL Buck-Boost BDC with non-common ground for input and output

Figure 1 (b) shows the input/output non-common ground Buck-Boost TL BDC. Q1, Q2, Q3, Q4 are four switch tubes, D1, D2, D3, D4 are their body diodes, Lf is the filter inductor, Cb1, Cb2 are the voltage-equalizing capacitors, and Cf2 is the filter capacitor. Each switch tube is driven by the same drive signal as the input-output common ground TL Buck-Boost BDC, and its working mode is similar, which will not be repeated here. Compared with the input-output common ground type Buck-Boost BDC, there is no startup problem, but there are also the following shortcomings:

1) The voltage division of Cb1 and Cb2 is uneven, resulting in uneven stress on the switch tube.

2) The input and output are not grounded, and the anti-interference ability is poor.

3 Simulation

In order to verify the feasibility of the control scheme proposed in this paper, this section uses Saber to simulate and analyze the circuit. The simulation parameters are as follows:

·iLf is always greater than zero: U1=270VDC, D=0.8, I2=6A, fs=50kHz, Lf=350uH, Cf1=350uF;
·iLf changes alternately: U1=270VDC, D=0.8, I2=6A, fs=50kHz, Lf=35uH, Cf1=350uF;
·iLf is always less than zero: U2=200VDC, D=0.8, I1=2.5A, fs=50kHz, Lf=350uH, Cf2=350uF;

The following conclusions can be drawn from the simulation waveforms:

1) Compare the inductor current in Figure 4 (a~c): the average value of iLf can change positive and negative, and the converter is a bidirectional converter;
2) The blocking capacitor voltage Vcblock in Figure 4 (a~c) is stable at U1/2, which is consistent with the theoretical analysis;
3) From the waveforms of Vds (Q1) and Vds (Q3) in Figure 4 (a-c), it can be seen that the voltage on the switch is U1/2, which is half of that of the two-level Buck-Boost BDC [12], which is consistent with the theoretical analysis.
4) The VAB frequency in Figure 4 (a-e) is one times the drive signal Vgs, and compared with the two-level Buck-Boost BDC converter, the VAB pulsation is reduced from U1-0 to U1-U1/2 (U1/2-0 when D<0.5), and the pulsation value is reduced by half, which is beneficial to reducing the size and weight of the filter and improving the dynamic performance of the converter.
5) Analyzing iCblock and iLf in Figure 4 (a-c), in the alternating working mode of the inductor current, the diode is naturally turned off, there is no reverse recovery current, and the switch is a zero voltage switch.
6) The interleaved control scheme makes the inductor current rise time and fall time evenly divide one cycle. Compared with the non-interleaved control scheme, the inductor current ripple is minimized. As shown in Figure 4 (d) and (e), the solid line represents the staggered control scheme.

4 Conclusion

This paper proposes two three-level Buck-Boost bidirectional converter circuit topologies and their interleaved complementary control schemes, analyzes three typical working modes of D>0.5 in detail, derives the basic relationship, verifies the feasibility of the control scheme, and lays a theoretical foundation for further research.

References:

[1] Ponstantin P.Louganski. Modeling and analysis of a DC power distribution system in 21th century airlifters [D]. Master of Science thesis. Blacksburg, VA: Department of Electrical and Computer Engineering,Virginia Tech,September 1999
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[3] M.Jain,M.Danielle.K Jain.A bi-directional DC-DC converter topology for low power application [J].in:IEEE Transaction on Power Electronics,Vol.15, No 4,july 2000:595-606
[4] Hirofumi Matsuo,Fujio Kurkawa. C converter topology for low power application [J].IEEE Transaction on Power Electronics,Vol.15, No 4,julyNew solar cell power supply system using a Boost type bidirectional DC-DC converter [A] . IEEE PESC.[D].1982.14~19
[5] J.Renes Pinheiro and Ivo Barbi.The three-level ZVS PWM Converter - A new concept in high-voltage dc-dc conversion.[A] IEEE IECON.[D]. 1992.173~178
[6] Xinbo Ruan, Bin Li, and Qianhong Chen.Three - Level Converters—A New Approach for High Voltage and High power DC-to-DC Conversion[A].IEEE PESC.[D]2002.663~668
[7] J.Renes Pinheiro and Ivo Barbi.Wide load range the three-level zvs pwm dc-to-dc converter[A].IEEE PESC.[D]. 1993.171~177

Keywords：Converter Reference address：Simulation Study of Three-Level Buck-Boost Bidirectional Converter

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