How to Design a MAX13256 Voltage Buffer

Publisher:科技梦行者Latest update time:2011-10-24 Source: 互联网Keywords:MAX13256 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

Abstract: The MAX13256 features an adjustable overcurrent threshold for short-circuit protection. It is difficult to design a buffer for this device using standard methods. This application note describes how to design a voltage buffer for the MAX13256 while taking into account the current-limiting feature.

The MAX13256 is an integrated primary-side controller for isolated power circuits. The device features dual push-pull drivers, ST1 and ST2, to drive an external transformer. This driver scheme can cause large transient voltage spikes on the drain of the power switches. The voltage spikes occur because parasitic inductance, coupled with parasitic capacitance at the power FET outputs, forms a resonant circuit. Left unattended, these large voltage spikes can increase stress on the internal switches and can also increase electromagnetic interference (EMI) caused by the system. During normal operation, internal diodes clamp the voltage that drains a diode above VDD or below ground during switching. However, due to very fast short-circuit detection and response, large voltage spikes can occur on ST1 and ST2 during a short-circuit event. Figure 1 shows a typical short-circuit between ST1 and ST2 on the MAX13256 evaluation board output. As can be seen in the figure, as long as 42V high voltage spikes will occur (with a supply voltage of 28V), risking damage to the internal FETs and reduced efficiency. Larger voltage spikes will occur at higher supply voltages. Detailed image (PDF, 1.5MB) Figure 1. The MAX13256 shorts the outputs of ST1 (CH1) and ST2 (CH2). A simple RC network (shown in Figure 2) added to each drain (ST1 and ST2) can be used to suppress these voltage spikes, but the current-limiting feature of the MAX13256 makes it difficult to design the snubber using standard methods. Figure 2. Simple RC Snubber for the MAX13256 To accommodate current limitations, we must modify the typical snubber design process slightly:

To calculate the MAX13256 current limit, use the following formula:

LIMIT(mA) = 650(mV)/R TH(KΩ)

The minimum snubber resistance is limited by this current. To calculate the snubber resistance, R snubber, use the following formula:

? = V PEAK / I LIMIT

Where VPEAK is the peak voltage on ST1/ST2 during a short-circuit event. Be sure to use proper probing techniques when measuring VPEAK, making sure to probe the ST1/ST2 voltage as close to the MAX13256 IC as possible, keep the ground lead short, and use the appropriate probe bandwidth for accurate readings to avoid erroneous readings.

With the resistors in place, add the snubber capacitors. You will need to adjust the snubber capacitor value until the peak voltage on ST1/ST2 is below 40V. A good starting value is 200pF.

For example:

For this example, the MAX13256 is connected to a 1:1 transformer in a full-wave rectifier configuration on an internal evaluation board. VDD is 36V. The maximum peak measured at ST1/ST2 under a short-circuit condition is approximately 49V (Figure 3). Detailed image (PDF, 1.4MB) Figure 3. The voltage spikes at ST1 (CH1) and ST2 (CH2) under a short-circuit condition. Using a 1kΩ current-limiting resistor, we can expect a current limit of 650mA (typical), and can calculate R as follows:

? = 49V/0.65A =75Ω

Note that this value may need to be adjusted slightly if the actual device current limit is less than 650mA. For our circuit, we used a 91Ω buffer resistor to compensate for the slightly lower actual current limit. As shown, a 220pF buffer capacitor reduces the short-circuit peak voltage to 38.4V, a 270pF capacitor further reduces the absorption peak voltage to about 38V, and a 330pF capacitor reduces the buffer peak to 37V. Although they protect the circuit during short-circuit conditions, the buffer components will have a slightly negative impact on the efficiency of the circuit during normal operation. It is for this reason that smaller component values ​​are often preferred. We measured the efficiency of the circuit with output loads: (1) no buffer; (2) 91Ω, 220pF buffer; (3) 91Ω, 270pF buffer; and (4) 91Ω, 330pF buffer on ST1 and ST2 (Figure 4) Figure 4. for the MAX13256. The efficiency vs. load measurements in Figure 4 clearly show that the addition of any buffer reduces the efficiency of the circuit. The actual size of the snubber components (especially the snubber capacitor in this example) will depend on the load in normal operation and the trade-off between efficiency and protection. In this case, the efficiency is greater for smaller loads than for larger loads for different snubber capacitor values.

Keywords:MAX13256 Reference address:How to Design a MAX13256 Voltage Buffer

Previous article:Using waveform conversion to determine the detection method of AC voltmeter
Next article:High performance 32W double tube fluorescent lamp electronic ballast circuit

Latest Power Management Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号