A low voltage high gain three-stage amplifier comparator for switching power supply

A comparator can compare an analog signal with another analog signal or a reference signal, and output a binary signal obtained by comparison. The analog signal here refers to a signal whose amplitude changes continuously at any given moment. Strictly speaking, a binary signal can only take one of two given values ​​at any moment.

Comparators are widely used in switching power supplies and digital-to-analog converters. In addition, they are also used in zero-crossing detectors, peak detection systems, full-wave rectifiers, etc.

1 Design of comparator

The comparator designed in this paper is a high-gain three-stage comparator. The first stage is a common differential amplifier, the second stage is a folded common-source common-gate differential amplifier, and the third stage is a common-source amplifier and a push-pull inverting amplifier. There is also a bias circuit to provide bias for the amplifier.

1.1 Comparator first-stage amplifier

The first-stage amplifier is the input stage circuit of the comparator, as shown in Figure 1. It is a differential amplifier of common structure, which is basically the same as the first-stage structure of the operational amplifier of the bandgap reference voltage source, so it will not be analyzed again. The tube parameters are adjusted so that all the tubes are in the saturation region, and their gain-frequency characteristics are simulated. The results are shown in Figure 2.

1.2 Comparator Second-stage Amplifier

The second-stage amplifier of the comparator is also called the intermediate stage or gain stage. PMOS tube is used as the input tube of the folded common source and common gate structure, and the circuit is shown in Figure 2. The PMOS tube can be short-circuited with the substrate source to eliminate the substrate bias effect. The output gain simulation is shown in Figure 3.

1.3 Comparator output stage
As shown in Figure 4, the output stage is composed of a common source amplifier circuit composed of M13 and M14 and a push-pull reverse amplifier composed of M15 and M16.

1.4 Bias circuit design
As shown in Figure 5, the bias circuit uses a common source and common gate current mirror. The diode-connected M19, M21 and M23 are used as a voltage divider circuit. The tube parameters are adjusted to make all tubes in the saturation region.

2 Analysis of simulation results of the comparator
Based on the 0.1 8μm CMOS process, the simulation is performed under Hspice. The power supply voltage VDD=1.8V is used.
First, the transient simulation of the comparator designed in this paper is performed. When the input Vin1=0.6V, Vin2=sin(0.6 500m 1k), the input and output waveforms are shown in Figure 6. Figure 3 shows the waveforms of the primary output, secondary output and tertiary common source output.

The output gain is simulated as shown in Figure 7. It can be seen that the maximum gain is 143dB. The gain at -3dB is 143dB and the frequency is 377kHz. The maximum gain, -3dB gain and -3dB gain frequency are tested using the .meas statement as shown in Figure 8.

3 Conclusion
After the circuit diagram in this article is netlisted under LTspice, it is simulated in Hspice. The gain in the reference is 104dB and the operating frequency is 145kHz, while the gain in the reference is 104dB and the operating frequency is 710kHz. Both this article and the reference adopt a three-level structure. It can be seen that the comparator designed in this article can be used as both a PWM comparator and a current limiting comparator, and their essence is the same.