Design and implementation of a speech system based on AMBE-2000

0 Introduction

Voice communication is one of the most commonly used communication methods in digital communication systems. Excellent voice coding and decoding algorithms can more effectively save bandwidth resources and improve frequency utilization. Now voice coding technology can be widely used in many military fields such as voice multi-channel transmission, satellite communication, and confidential communication. AMBE-2000 launched by Digital Voice System Inc. is a high-performance, low-power real-time codec chip based on advanced multi-band excitation voice coding algorithm. Its compression rate is adjustable from 2 000 to 9 600 b/s, and it has multiple functions such as forward error correction (FEC), voice activation detection (VAD), and dual-tone multi-frequency (DTMF) signal detection.

1 System Introduction

The main function of this voice system is to realize the mutual conversion between digital voice and analog voice and process the encoding and decoding of voice data, reduce the transmission rate of voice data, improve the frequency resource utilization of the system, and meet the interface requirements of the information system. The analog voice part is connected to the headphone microphone group, the digital part compresses the data stream to connect to the external processor, and the decompressed data stream is used to transmit voice quantization information over long distances. The principle block diagram of the entire voice system is shown in Figure 1.

When sending voice, the voice processing board will perform A/D sampling and quantization on the incoming analog voice, compress and package it through the voice codec chip, and send it to the information processor through the CPCI bus or LVDS serial bus for subsequent processing; or compress the voice quantization information transmitted over a long distance through the high-speed RS 422 serial port and send it to the information processor through the CPCI bus or LVDS serial bus for subsequent processing.

When receiving voice, the compressed data is received through the CPCI bus or LVDS serial bus, and after being decoded by the voice codec chip, the voice is converted into an analog signal through D/A conversion; or the received compressed data is decompressed and transmitted over a long distance through the high-speed RS 422 serial port.

2. Functions and Features of AMBE-2000

The AMBE-2000 chip is an improved product of the AMBE-1000. Compared with the AMBE-1000, its voice compression algorithm is more optimized, the voice quality is higher, and the minimum coding rate is reduced from the original 2400 b/s to 2000 b/s. Several improvements have also been made in the hardware and interface, and the efficiency and reliability of its compression coding and forward error correction coding (FEC) have been improved. The internal calculation amount is small and the power consumption is low. Its algorithm complexity is 13 MIPS (million instructions per second), which can achieve low power consumption: only 65 mW at 3.3 V and only 0.11 mW in deep sleep.

In the simple model, AMBE-2000 is considered as two separate components, encoder and decoder. The encoder receives the speech quantization information (16-bit linear, 8-bit A-law or 8-bit μ-law) and outputs the compressed data stream to the channel at the desired rate. Conversely, the decoder receives the channel compressed data stream and synthesizes the speech quantization information. The timing control of the AMBE-2000 encoder/decoder interface is completely asynchronous. Usually the voice interface is connected to the A/D and D/A chips. The input and output voice data streams must be the same. Format (16-bit linear, 8-bit A-law, or 8-bit μ-law). This system uses AMBE-2000 and the A/DD/A chip uses the AD73311 with 16-bit linear sampling in order to maintain compatibility with an original voice system designed based on AMBE-1000. The old voice system based on AMBE-1000 uses the 16-bit linear A/D and D/A chip TI32044, which is too large and has high power consumption, and uses a series of peripheral chips with the same shortcomings. It is not suitable for the development trend of low power consumption and small size.

3 Interface design between AMBE-2000 and A/DD/A chip

The voice data stream format between the A/DD/A chip and the AMBE-2000 should match, that is, it should have a unified format (16-bit linear, 8-bit A-law, or 8-bμ-law). In general, it is recommended to use 16-bit linear components. In this design, AD73311 from AD Company is selected. The voice interface of AMBE-2000 can be set to communicate specifically with AD73311 by configuring hardware pins 84 and 85 (CODEC_SEL[1-0]=01b). Therefore, the use of AMBE-2000 and AD73311 together will make the circuit design simpler.

AD73311 main features:

(1) Low-power 16-bit A/DD/A converter, input/output sampling rate and gain can be controlled by software, providing a 70 dB signal-to-noise ratio within the voice band. Voice data is transmitted through the serial port and control commands are received, which is simple and efficient.

(2) The input analog audio signal is converted into a digital signal after passing through a variable gain amplifier and A/D converter and output through the serial port; conversely, the digital stream from the serial port is converted into an analog signal and output after passing through a variable gain amplifier.

(3) There are two main working modes of AD73311: programming mode and data mode. After the chip is reset, it is in the default programming mode. At this time, the control word can be written to the control register through the serial port to set the working state. It should be noted here that when the AD73311 is in the 3 V low power state (as shown in Figure 2), the configuration word should be set to the corresponding format.

(4) After power-on reset, the CODEC_TX_DATA signal of AMBE-2000 should be isolated from the serial input of AD73311 and maintained for about 365 ms. At this time, use FPGA to configure AD73311. The configuration word is as follows:

After the setup is completed, register A is written to Q1, indicating that the "data mode" has been entered. The CODEC_TX_DATA signal of AMBE-2000 should be connected to the serial input of AD73311, and normal data transmission can be carried out.

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4 AMBE-2000 and channel interface design

AMBE-2000 requires the encoder to be read by the controller once every 20 ms. After reset, the EPR will change from high to low when the initial frame is ready, and then one frame of data will be ready every 20 ms. Correspondingly, the external controller also needs to read one data frame every 20 ms.

The EPR pulse appears once every 20 ms, which is also an important basis for judging whether the AMBE-2000 is working properly. The whole process of reading data is:

(1) Waiting time is less than 20 ms;

(2) Send a frame synchronization signal and read a frame of serial output data from AMBE-2000;

(3) If the received data is not 0x13EC, it is not a data frame header. The frame is discarded and step (2) is executed again.

(4) If the data received is 0x13EC, read the remaining 23 words of this packet.

In this design, FPGA is used as an external controller. FPGA generates input/output frame synchronization signals, input/output clock signals and serial input data of AMBE-2000, and exchanges data with AMBE-2000 according to the timing relationship required by AMBE-2000.

Table 1 lists the characteristics of the channel interface signals of AMBE-2000. Its data transmission mode with the external controller is shown in Figures 3 and 4.

5. System peripheral interface design

The peripheral interfaces of the system include: CPCI interface circuit; conversion circuit between LVTTL and standard LVDS level signal; conversion circuit between LVTTL and standard RS 422 level signal; analog circuit.

5.1 CPCI Interface Circuit

The use of CPCI-specific bridge chips can avoid complex PCI protocols and quickly develop products. Therefore, PLX's high-performance dedicated bridge chip PCI9054 is used to implement the CPCI interface design. The internal IP core of the FPGA is used to generate dual ports and establish bonding logic with the CPCI part to complete the CPCI interface design.

5.2 Conversion circuit between LVTTL and standard LVDS level

In addition to the standard CPCI bus form to realize the data exchange between the digital part compressed data stream and external communication equipment, this system also uses LVDS serial bus transmission, which requires a transmission rate of up to 100 Mb/s. The system uses MAX9129 and MAX9122 bus low-voltage differential signal drivers as drivers for LVTTL and standard LVDS level signal conversion circuits.

5.3 Conversion circuit between LVTTL and standard RS 422 level

The decompressed voice data stream is exchanged with the external digital audio device data in the standard RS 422 serial bus mode, and the required transmission rate can reach 5 Mb/s. This system uses the MAX3491 low-power RS ​​485/RS 422 transceiver as the driver of the LVTTL and standard RS 422 level signal conversion circuit for long-distance data transmission. Each MAX3491 chip contains 1 driver and 1 receiver, and the maximum transmission rate can reach 10 Mb/s.

5.4 Analog Circuit

The analog amplifier circuit includes an operational amplifier and some component components. Its main function is to use a high-performance, low-noise amplifier to adjust the gain of the input/output voice signal through a potentiometer or appropriate proportional resistor.

The audio interface circuit of this design adopts active balanced input/output voice transmission mode, which plays the role of differential mode amplification and common mode suppression, and improves the anti-interference ability. In the early days of audio production, people often used transformers to correct the ground potential difference between different devices and cancel the electrical noise generated in the cable line. It can also connect active devices with unbalanced high impedance characteristics inside and balanced transmission lines with lower impedance characteristics. However, transformers increase costs and system weight, and transformers sometimes cause system distortion. Therefore, designers continue to seek ways to remove transformers, and as a result, they found active balanced input/output circuits.

6 Conclusion

The voice system adopts 6U CPCI standard board and half-duplex working mode. Within the voice bandwidth of 300-3400Hz, the voice word intelligibility is greater than or equal to 90%, and the voice sentence intelligibility is 100%. The intonation is natural and the pronunciation is clear. It is a high-quality voice system.