CMOS Image Sensor Chip OV5017 and Its Application

Abstract: This paper expounds the general characteristics of CMOS image sensors, introduces the performance and usage characteristics of CMOS black and white image sensor chip OV5017 in detail, and discusses the application of OV5017 in image acquisition.

1 General Characteristics of CMOS Image Sensors

At present, CCD (charge coupled device) is the main practical solid-state image sensor device, which has the advantages of low read noise, large dynamic range, and high response sensitivity. However, CCD technology is difficult to integrate with mainstream CMOS technology on the same chip. In this way, supporting circuits such as timing generation, drive amplification, automatic exposure control, analog-to-digital conversion and signal processing cannot be made on the same chip as the pixel array. Image sensors based on CCD are difficult to achieve monolithic integration, and therefore have disadvantages such as large size and high power consumption.

CMOS image sensor is a new type of image sensor that has developed rapidly in recent years. Because it uses the same CMOS technology, the pixel array and peripheral support circuits can be integrated on the same chip. In fact, CMOS image sensor is a relatively complete image system (Camera on Chip), which usually includes: an image sensor core, a single clock, all timing logic, programmable functions and analog-to-digital converters. Its basic structure is shown in Figure 1.

Compared with CCD, CMOS image sensor integrates the entire image system on one chip, which has the following advantages:

(1) Small size, light weight and low power consumption;

(2) Easy to program and control;

(3) Low average cost.

2 Performance and characteristics of OV5017

2.1 Basic performance of OV5017

OV5017 is a CMOS black-and-white image sensor chip developed by OmniVision, an American company. The chip integrates a CMOS light-sensing core with peripheral support circuits and has functions such as programmable control and video analog/digital mixed output. The output video is a black-and-white image and is compatible with the CCIR standard.

The basic parameters of the OV5017 chip are:

(1) Image size: 4.2 mm × 3.2 mm, pixel size: 11 μm × 11 μm;

(2) Signal-to-noise ratio (SNR)>42dB;

(3) When the frame rate is 50, the minimum illumination is 0.5lux@f1.4;

(4) When the frame rate is 50, the peak power consumption is less than 100mW.

OV5017 outputs analog video signals in a progressive scan format. OV5017 has an 8-bit A/D embedded inside, so it can synchronously output an 8-bit digital video stream D[7…0]. While outputting the digital video stream, it also provides pixel clock PCLK, horizontal reference signal HREF, and vertical synchronization signal VSYNC to facilitate external circuits to read images.

The pixel array of OV5017 is 384×288, which is divided into 16×16 sub-blocks, each sub-block is 24×18 in size. It can open a window on a part of the entire image and output the image in the window.

2.2 OV5017 programming function

OV5017 has rich programming control functions. Its image frame rate, exposure time, gain control, gamma correction, image windowing, etc. can all be set by reading and writing internal registers of the chip. The output of the digital video stream must also be achieved by reading the registers.

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There are 11 8-bit registers inside the chip. The registers are selected by setting the address line A[3..0] and read or set by the read/write data line [7..0]. When reading (or writing) the registers, the chip select CSB and output enable OEB (or fixed enable WEB) should be enabled.

The register at address number 10xx is the video data port, which is read-only. When it is selected and read, the chip outputs the data video stream to the outside.

The register at address 0000 is the status register, which is read-only and reflects certain states of the chip.

The register at address 0001 is the frame control register, which is write-only and is used to control the synchronization signals of the frame and line.

The register at address 0010 is the exposure control register, which is read-write and can select automatic exposure or manual exposure. The exposure time is controlled between 1 frame and 1/100 frame.

The register at address 0011 is the gain control register, which is read-write. When manually exposed, the gain is controlled between 0 and 18dB.

The register at address 0100 is the frame rate control register, which is read-write and the frame rate is controlled between 50 and 0.5fps.

The register at address 0101 is a miscellaneous control register, which is read-write and is responsible for setting functions such as gamma correction, image sharpening, background light compensation, and image sharpening.

The registers at address 0110 and 0111 are window control registers, both of which are read-write and are responsible for setting the horizontal size, horizontal position, vertical size, and vertical position of the window to determine a window in the image.

Registers at address 1110 and 1111 are reserved for testing.

2.3 Output of digital images

The output of digital video stream in OV5017 must be realized by reading the video data port in the chip, that is, the register with address number 10xx. The steps are:

(1) Set the address bus A[3..0] to 10xx;

(2) Enable chip select CSB and output enable OEB.

If you need to output a partial image, you should set the window control register in advance.

The timing of digital video stream output is shown in Figure 2. In the figure,

TPHD: TCLK falling edge to HREF valid, maximum 25ns;

TPDD: PCLK rising edge to video data valid, maximum 25ns;

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VD: Video data.

Due to space limitations, only the timing of the output of 4 pixels in one row of the image is given here. According to the timing shown in Figure 2, the external circuit can read the image data output by the chip.

3 Image Acquisition System Based on OV5017

The structure of the image acquisition system based on OV5017 is shown in Figure 3.

In this system, OV5017 is used as the image sensor of the system. It collects and quantizes the acquired images internally, outputs digital images under the control of external logic, and stores them in the image memory. Here, the pins A[3..0] and D[3..0] of OV5017 reuse the common external data line, so a latch is added to separate them. When reading and writing the internal register of OV5017, two operations are required, that is, first select the register and then read the register. At the same time, in order to avoid bus conflicts, a bus isolation is added between the low 8-bit data line of TMS320C31 and the data of OV5017, and between the address line of TMS320C31 and the acquisition address.

The process of the system reading the image is:

(1) Initialize the decoder and timing generator;

(2) Set the internal control registers of OV5017 as needed, such as exposure control, gain control, window control, etc.;

(3) Select the video data port of OV5017, that is, register 10xx;

(4) TMS320C31 sends a signal to the decoder and timing generator to notify it to start collecting images;

(5) The decoding and timing generator enables bus isolation, and generates the chip select, write and address signals of the image memory according to the reference signals output by OV5017, namely VSYNC, HREF and PCLK. In this way, the digital image is stored in the image memory in a continuous manner;

(6) TMS320C31 sends a signal to the decoder and timing generator to stop acquiring images, and OV5017 stops outputting digital images.

During image acquisition, TMS320C31 can access other memories or ports except image memory and OV5017.

Since the system omits A/D and other devices, it has the advantages of simple structure, small size, low power consumption, etc. At the same time, since OV5017 has embedded exposure, gain, window opening and other control circuits, and is easy to program, it improves the functional flexibility of the acquisition system. This system is suitable for monitoring, multimedia and other applications.