A brief introduction to high-speed serial signal testing

Previously, I have written two articles on some key points in high-speed serial bus system testing, which introduced eye diagram testing, clock recovery, jitter measurement, and jitter classification (please refer to "A Simple Introduction to High-Speed ​​Serial Signal Testing (I) and (II)". With these basic concepts, we can grasp some key points in both system design and system testing to ensure that our products can meet the expected requirements within the scheduled time.

If we are engaged in the R&D of high-speed IC or high-speed IO modules, we must not only ensure that the products we provide can meet the interface indicators specified by industry specifications (such as output voltage swing, jitter, eye diagram, etc.), but also ensure that the system built by the customer after purchasing our products has sufficient system stability - that is, the bit error rate requirements.

The bit error rate is probably the most important and intuitive representation of the system indicators. It was originally born in the communication system test, reflecting the impact of the channel on the information. For high-speed serial bus systems, it describes the probability of receiving an erroneous bit at the receiving end when the signal is transmitted in the channel interconnection (routing, connectors, cables, etc.).

BER=Received Error Bit Number / Total Transferred Bit Number

Although the definition is simple, it contains too much content. BER testing has always been an important test item in the Telecom field; in recent years, with the increasing serial rate, the concept of BER has become more and more important in Datacom, PC, and even embedded fields. Simply put, BER testing includes Tx, Rx, and the complete link and system-level inspection, and is an important parameter for system calibration.

In "A Simple Introduction to High-Speed ​​Serial Signal Testing (Part 2)", we focused on the measurement and analysis of jitter and noise, the ultimate goal of which is to evaluate the system bit error rate. The reason why it is "evaluation" rather than "measurement" here is precisely because it reflects the limitations of oscilloscopes for BER testing. According to the definition of BER, the instrument for testing BER must be able to continuously generate test bits and receive bits sent back by the DUT, compare whether the sent and received bits are consistent, and determine the number of error bits and the probability of occurrence. The bit error rate analyzer (BERT) is a typical instrument for testing BER. Usually, an oscilloscope can only complete the sampling of the signal sent by the DUT, can test jitter and eye diagrams, but cannot directly measure BER (Tektronix has the only real-time oscilloscope in the industry that can provide bit error detection functions, please refer to the previous blog post for details).

Traditional BERT is the best choice for testing BER, but when the DUT bit error rate does not meet the requirements, engineers often hope that the test instrument can provide some debugging directions and information. Unfortunately, BERT cannot do this. For example, signal integrity testing and analysis, impedance measurement, protocol-related analysis, etc. require time domain instruments such as oscilloscopes to test. Figure 1 vividly distinguishes the functions and applications of BERT and oscilloscopes.

Figure 1: BERT and oscilloscope functions and applications

Where there is demand, there is a market. The BERTScope series of products is a high-performance, highly integrated, easy-to-operate measurement, verification and debugging tool for high-speed serial systems that combines the advantages of BERT and Scope. From the name, BERTScope can replace the traditional BERT to complete the bit error rate test; and it can also realize the oscilloscope function: analyze eye diagrams, jitter and other indicators of high-speed serial buses. More importantly, the oscilloscope function of BERTScope is based on the acquisition of each bit. That is to say, when BERTScope performs jitter and eye diagram tests, it will fully take into account the information of each bit in the data stream. In this way, as an extension of the oscilloscope debugging tool, BERTScope can measure jitter under deeper sample conditions and analyze error events with a smaller probability.

Figure 2: Jitter analysis + bit error rate test, easy system debugging

As data rates continue to increase, various specifications have begun to change the system bit error rate requirements from the previous consideration of Tx alone to the consideration of both Tx and Rx. In other words, the test of receiving tolerance at the Rx end will become more and more popular in future high-speed serial bus systems. BERTScope has the ability of closed-loop testing. The code generation part can generate a code stream of up to 26.5Gbps, and can also add the jitter required for Rx tolerance testing in the code stream.

Figure 3: BERTScope’s built-in jitter and noise generation functions. It can generate various signals for Rx tolerance testing.

Especially for Rx tolerance tests with signal rates greater than 6Gbps, such as PCIE Gen3, 10Gbase-KR, etc., the built-in Stress signal source of BERTScope generates various jitter signals to stimulate the DUT; BERTScope can also send standard protocol bit streams to set the DUT to Loopback mode online; at the same time, the BERT part can detect the DUT bit error rate to determine whether the BER of the DUT meets the standard requirements under different jitter conditions.

BERTScope will bring revolutionary changes to the future high-speed serial field, including testing of chips, modules, backplanes and systems, to meet the requirements of high-speed, accurate and convenient testing systems in the future.

We currently offer the following handouts for download:

• BERTScope Bit Error Rate Analyzer Overview and Relationship with Oscilloscope
• Exploring the Advantages of BERTScope in High-Speed ​​Serial Data
• 10GbE-KR BERTScope Test Methodology