Bandwidth, sampling rate, and memory depth: three key indicators of oscilloscopes explained in detail

Figure 7 shows the comparison of the measurement results of a pulse with a rise time of 1ns measured by an oscilloscope with an analog bandwidth of 1GHz at different sampling rates. It can be seen that a sampling rate of more than 5 times the bandwidth provides good measurement accuracy. Furthermore, based on our experience, it is recommended that engineers ensure that there are more than 5 sampling points on the rising edge when measuring pulse waves, which not only ensures that the waveform is not distorted, but also improves the measurement accuracy.

Figure 7 Relationship between sampling rate and bandwidth

Figure 8: Low sampling rate leads to waveform distortion

When talking about sampling rate, we cannot ignore the memory depth. For DSO, these two parameters are closely related.

Storage, storage depth

The storage of the oscilloscope is to store the eight-bit binary waveform information after A/D digitization in the high-speed CMOS memory of the oscilloscope. This process is called the "write process". The capacity (storage depth) of the memory is very important. For DSO, its maximum storage depth is fixed, but the storage length used in actual testing is variable.

When the storage depth is constant, the faster the storage speed, the shorter the storage time. There is an inverse relationship between them. The storage speed is equivalent to the sampling rate, and the storage time is equivalent to the sampling time. The sampling time is determined by the time represented by the display window of the oscilloscope, so: Storage depth = sampling rate × sampling time (distance = speed × time)

The Time Base label of the LeCroy oscilloscope intuitively displays the relationship between these three, as shown in Figure 9.

Figure 9 Relationship between storage depth, sampling rate, and sampling time (time base)

Since the horizontal scale of the DSO is divided into 10 grids, the length of time represented by each grid is the time base (time base), and the unit is t/div, so the sampling time = time base × 10. From the above relationship, we know that increasing the storage depth of the oscilloscope can indirectly increase the sampling rate of the oscilloscope: when measuring a waveform for a long time, since the storage depth is fixed, it can only be achieved by reducing the sampling rate, but this will inevitably cause a decrease in the quality of the waveform; if the storage depth is increased, it can be measured at a higher sampling rate to obtain an undistorted waveform. The curve in Figure 10 fully reveals the relationship between the sampling rate, storage depth, and sampling time, as well as the impact of the storage depth on the actual sampling rate of the oscilloscope. For example, when the time base selects 10us/div, the sampling time of the entire oscilloscope window is 10us/div * 10 grids = 100us. At a storage depth of 1Mpts, the current actual sampling rate is: 1M÷100us=10Gs/s. If the storage depth is only 250K, then the current actual sampling rate is only 2.5GS/s! 

Figure 10 Memory depth determines the actual sampling rate

In a word, memory depth determines the DSO's ability to analyze both high-frequency and low-frequency phenomena, including high-frequency noise in low-speed signals and low-frequency modulation in high-speed signals.

After discussing the relevant theories of sampling rate and storage depth, let's take a deeper look at the impact of these two parameters on our actual tests in combination with common applications.

The Importance of Long Storage in Power Measurements

Since the frequency of power electronics is relatively low (mostly less than 1MHz), engineers who are used to using high-bandwidth oscilloscopes for high-speed signal measurements often have an illusion that power supply measurements may be simple. The fact is that many engineers make mistakes in choosing oscilloscopes for power supply measurement applications. Although the bandwidth of a 500MHz oscilloscope is sufficient for the power supply switching frequency of several hundred kHz, we often ignore the selection of sampling rate and storage depth. For example, in the test of common switching power supplies, the frequency of voltage switching is generally 200KHz or faster. Since there is often power frequency modulation in the switching signal, engineers need to capture a quarter cycle or half cycle of the power frequency signal, or even multiple cycles. The rise time of the switching signal is about 100ns. We recommend that in order to ensure accurate reconstruction of the waveform, there should be more than 5 sampling points on the rising edge of the signal, that is, the sampling rate should be at least 5/100ns=50MS/s, that is, the time interval between two sampling points should be less than 100/5=20ns. For the requirement of capturing at least one power frequency cycle, it means that we need to capture a 20ms long waveform, so we can calculate the required storage depth of each channel of the oscilloscope = 20ms/20ns=1Mpts!!! Similarly, in analyzing the maximum value of the voltage stress borne by the power device during the soft start process of the power supply, it is necessary to capture the entire power-on process (more than ten milliseconds), and the required oscilloscope sampling rate and storage depth are even higher!

Unfortunately, I often see engineers using an oscilloscope with only 10K memory depth per channel to perform the above power supply test!!! This makes me feel more and more that as an oscilloscope manufacturer, it is necessary to devote more energy and time to help engineers establish the correct concept of using oscilloscopes. This is also the original intention of our Shenzhen office to write a series of articles.

Effect of memory depth on FFT results

In a DSO, the spectrum of a signal can be obtained through the fast Fourier transform (FFT), and then a signal can be analyzed in the frequency domain. For example, the measurement of power supply harmonics requires FFT to observe the spectrum. In the measurement of high-speed serial data, FFT is often used to analyze the noise and interference that cause system failure. For FFT operations, the total amount of acquisition memory available to the oscilloscope will determine the maximum range (Nyquist frequency) in which the signal components can be observed, and the memory depth also determines the frequency resolution △f. If the Nyquist frequency is 500 MHz and the resolution is 10 kHz, consider determining the length of the observation window and the size of the acquisition buffer. To obtain a resolution of 10kHz, the acquisition time must be at least: T = 1/△f = 1/10 kHz = 100 ms. For a digital oscilloscope with 100 kB of memory, the highest frequency that can be analyzed is:

△f × N/2 = 10 kHz × 100 kB/2 = 500 MHz

Figure 11 Oscilloscope FFT operation

In the example shown in Figure 12, a 266 MHz signal is affected by noise pickup from a 30 kHz noise source. The FFT (lower trace) shows a series of peaks centered at 266 MHz and spaced 30 kHz apart. This type of distortion is very common and can be caused by crosstalk from a switching power supply, DC-DC converter, or other source. It can also be caused by intentional use of spread spectrum clocking.

Figure 12 FFT analysis of LeCroy oscilloscope

For DSO, long memory can produce better FFT results, increasing both frequency resolution and signal-to-noise ratio. In addition, for some applications, some very detailed information can only be analyzed at a memory depth of 20Mpts, as shown in Figures 13 and 14.

Figure 13: 1M-point FFT result does not reveal information about modulation

Figure 14: 20M-point FFT clearly confirms the bimodal distribution of the clock and the related modulation rules

It should be pointed out that FFT analysis of long waveforms requires the oscilloscope to have super data processing capabilities, which often exceeds the computing limit of some oscilloscopes. LeCroy oscilloscopes can perform up to 25M points of FFT, while the oscilloscopes of T Company in the industry can only perform up to 3.125M points of FFT analysis.

High-speed serial signal analysis requires truly long storage

Jitter analysis and eye diagram testing have become important means of analyzing high-speed serial links and an important reference for evaluating high-end oscilloscopes.

When using an oscilloscope for jitter testing, the high-speed acquisition memory length is a key indicator for the oscilloscope to perform jitter testing. The high-speed memory length not only determines the number of samples in a jitter test, but also determines the jitter frequency range that the oscilloscope can test. This is because all jitter has different frequency components, which usually range from DC to high frequency. The reciprocal of the oscilloscope's single acquisition time window indicates the frequency range of the jitter test. For example, if you use an oscilloscope with a sampling rate of 20G samples/second (S/s) and 1M sampling memory to capture a 2.5Gbps signal, then your oscilloscope screen can capture a 50 microsecond long waveform, which means that you can capture a low-frequency jitter cycle with a frequency of 20kHz. Similarly, for a 20GS/s sampling rate and 100M memory depth (such as LeCroy's SDA6000AXXL), you can capture a low-frequency jitter cycle of 200Hz.

Traditional oscilloscopes are designed to physically implement the high-speed acquisition front end (up to 80 ADCs) and high-speed memory with a single SoC chip. Since there are too many functions in one chip, the capacity of the high-speed memory on the chip is limited (generally less than 2M at 40GS/s), and only jitter above 20KHz can be measured. When low-frequency jitter needs to be tested, the memory cannot be expanded or upgraded. For most applications, it is very important to test and analyze jitter information in the range of 200Hz to 20KHz. In order to make up for the defects of this design structure, this type of oscilloscope will use external low-speed memory to make up for the high-speed memory on the chip, but the external memory cannot work at a high sampling rate and generally can only provide 2GS/s, and cannot provide meaningful jitter test results. For example, when using 40GS/s real-time high-speed acquisition, the amount of data collected by 512K memory at one time is only 12.5us, and only jitter with a frequency range of more than 80K can be tested. It is difficult to meet the test requirements in various serial bus and clock jitter tests.