Design of ADSL2+ Tester Based on ARM

　　introduction

　　In recent years, Asymmetric Digital Subscriber Line (ADSL) has been widely used around the world as an ideal solution to the "last mile" problem of the network. In China, ADSL services have become one of the main sources of revenue for operators. However, since the existing telephone lines are designed specifically for transmitting low-frequency voice signals, they are not conducive to high-frequency signal transmission, and the environment around the lines is harsh and complex. Whether it is the opening of ADSL services or normal operation and maintenance, a series of complex tests are required.

　　Most of the existing test instruments are foreign brands and expensive. Domestic products generally have limited test frequency bands and one-sided test results. In addition, due to the limited processing power of the core chip, the embedded operating system is not advanced, and the software package functions are not perfect, the management of test results is also chaotic. With the continuous growth of the market, especially after the launch of ADSL2/2+ based on ITU G.992.3/G.992.5 standards, test tools with reasonable prices, complete functions and easy operation have become an urgent need for broadband operators. Based on this situation, this paper proposes a new ADSL2+ tester, which uses an ARM9 processor and Windows CE operating system to comprehensively improve the processing power and reliability of the product, and uses an LCD touch screen to provide users with an intuitive and simple friendly interface, which can evaluate the network service quality at different locations of the user loop.

　　System hardware design

　　The system hardware structure is shown in Figure 1, which mainly consists of three parts: ARM control processing module, built-in Modem module and related simulation test module. The control processing module is the core part of the tester, responsible for the overall system control and related data processing.

　　Figure 1 System hardware structure

　　Control processing module

　　This instrument requires LCD display and touch screen, so it requires high-speed data processing capability and considerable control capability. The ARM9 series 32-bit microcontroller S3C2410X used in the system has a frequency of up to 203MHz, which can easily run WinCE, Linux and other operating systems and perform more complex information processing. At the same time, a 5-inch STN LCD screen is used to intuitively display various test indicators, making up for the defects of the display effect of existing test tools. The touch screen is used instead of the keyboard input part, making the portability advantage more prominent. Considering the needs of operating system operation and large-scale high-speed data processing, the system uses two 32M SDRAMs, one 32M NAND Flash and one 2M NOR Flash. The program, operating system and test data are stored in the NAND Flash, and the system boots from the 16-bit NOR Flash.

　　Built-in Modem module

　　When testing the line transmission performance, the system can be directly connected to the central office without the user modem. The ADSL/ADSL2/2+ data frame is converted by the built-in modem and sent to the CPU for decoding and analysis. Therefore, it is very important to choose a reliable and excellent modem chip. This system uses the BCM6338 chip based on the latest ADSL2+ standard from the American BROADCOM company, which is suitable for various types of networks such as ADSL/ADSL2/ADSL2+, ensuring the reliability of the test results.

　　Simulation test module

　　The physical layer test mainly includes voltage, resistance, capacitance test, etc., and has a built-in time domain reflectometer (TDR) for line fault location. All test functions are implemented by an independent board, and sent to the CPU for processing and storage through the general I/O port and A/D conversion port. The voltage, resistance, capacitance and other tests are calculated after measuring the voltage. S3C2410 has an 8-channel 10-bit ADC conversion module integrated inside. The A/D converter works in on-chip sampling and holding mode, supports power-down mode, and measures analog input voltage range of 0 to 3.3V. It can realize the conversion of external analog signals to digital signals in Windows CE environment. Figure 2 is a typical application of voltage measurement.

　　TEST0/TEST1 is the analog voltage to be measured. After 10 times voltage division, it is connected to a subtraction amplifier, and then connected to the 6th branch AD6 pin of 2410 for signal transmission and filtering. The 10-bit ADC value can be obtained through the device driver. Based on this value, the analog voltage VAD6 of AD6 is calculated as: *3.3. According to the schematic diagram, the voltage of the external test point TEST0 can be obtained. The calculation formula is:

　　System software design

　　The overall structure of the system software is shown in Figure 2.

　　Figure 2 System software structure

　　The system software was developed using Platform Builder 4.2 and Embedded Visual C++ 4.0 (EVC).

　　Operating system kernel

　　The key to this development task is to choose a real-time operating system that meets the application requirements and has the best cost-effectiveness. Taking into account the operating system's support for hardware and the ease of secondary development, the system uses Microsoft's Windows CE.

　　Customization and porting of operating systems is an important step in project development. We use the Platform Builder integrated development environment. After selecting the BSP, we cut down the kernel and deleted unnecessary system components according to project needs and memory capacity limitations. After establishing an operating system image project, we add custom module components to the corresponding project of Platform Builder to generate an operating system image. The Windows CE feature directory is extensible, and you can add your own features such as driver files to the feature directory. Platform Builder uses .cec files to establish the feature directory, which allows Platform Builder to display this feature in the integrated development environment and add this feature to an operating system.

　　app

　　The application program to be developed in this project mainly includes data operation and display and system control, which are developed and debugged using EVC. The main test items of the system include physical layer test and network layer test.

　　The physical layer test is used to test the physical layer parameters of the ADSL/ADSL2/2+ line, including ADSL/ADSL2/2+ connection status, connection mode, upstream/downstream rate, noise margin, line attenuation, output power, CRC error, HEC error, FEC error, OCD error, NCD error and channel bit map.

　　Through the built-in ADSL2+ Modem of the instrument, PPPoE dial-up is performed. After the PPPoE dial-up connection is established, the network layer Ping, Ipconfig, Tracert, and Route tests can be performed.

　　Device Drivers

　　Although Platform Builder comes with some standard BSPs and some general drivers, the drivers provided by Platform Builder cannot meet the requirements for some special devices and functions. In order to facilitate communication and control with the simulation test part and the use of the LCD touch screen, it is also necessary to write corresponding interface drivers, mainly including I/O port drivers with PWM functions for TDR testing, etc., which are written in C language.

　　PWM is a method of digitally encoding the level of an analog signal. By using a high-resolution counter, the duty cycle of a square wave is modulated to encode the level of a specific analog signal. S3C2410X integrates 4 timers with PWM function. When the PWM function is required, the driver can adjust the PWM control register to control the I/O port to output pulses of equal amplitude and different widths to achieve the ideal waveform. The PWM driver source code is omitted.