A Simple Digital Frequency Meter Based on DSP

　　With the rapid development of microelectronics and computer technology, various electronic measuring instruments have undergone tremendous changes in principle, function, accuracy and automation level. Especially after the birth of DSP technology, electronic measurement technology has entered a new era. In recent years, DSP has gradually become the basic device of various electronic devices, and gradually become the most promising sunrise industry in the 21st century, and is even hailed as the revolutionary standard-bearer of the information and digital era. In electronic measurement technology, frequency is one of the most basic parameters, and it has a very close relationship with the measurement of many electrical parameters and non-electrical quantities. For example, many sensors convert some non-electrical quantities into frequency for measurement, so the measurement of frequency becomes more important. A digital frequency meter is an instrument that uses numbers to display the frequency of the measured signal. The measured signal can be a sine wave, square wave or other periodically changing signal.

　　Digital frequency meters widely use high-speed integrated circuits and large-scale integrated circuits, making the instrument smaller, less power consuming, and more accurate and reliable. However, traditional frequency meters have large measurement errors and narrow ranges, so they are gradually being replaced by new digital frequency meters. DSP-based equal-precision frequency meters will be widely used due to their advantages of accurate measurement, high precision, convenience, and low price.

　　The simple digital frequency meter we designed can achieve equal-precision frequency measurement in a wide range without using any gated device control. The maximum relative error of measuring square waves in the range of 0.5Hz~10MHz is less than 2e-6, and the maximum relative error of measuring sine waves is less than 3.5e-5. The results are displayed on the computer through RS232 communication, which can easily monitor the data.

Design

　　General Introduction
　　The traditional equal-precision frequency measurement method uses a gate device to generate a gate signal, thereby achieving synchronization between the actual gate signal and the measured signal, eliminating the error of a pulse generated by counting the measured signal. Its principle diagram is shown in Figure 1.

Figure 1 Traditional equal-precision measurement principle

　　The gate time counted by hardware control, when the preset gate signal (i.e., the fixed gate signal) is high, the reference signal counter CNT1 and the measured signal counter CNT2 are not started, but wait for the rising edge of the measured signal to arrive before starting to count at the same time; when the preset gate signal is low, the two counters are not closed immediately, and they also have to wait until the rising edge of the measured signal arrives before closing; therefore, the actual gate time is an integer multiple of the measured signal cycle, thereby achieving synchronization between the gate and the measured signal. However, the actual gate time is not fixed and is related to the frequency of the measured signal. In addition, whether using a counter or a single-chip microcomputer, gating devices are always indispensable when achieving equal-precision measurements.

　　This design is based on the rich software resources of DSP. After judgment and processing, it completes the equal-precision measurement of the measured signal frequency. No gating devices are required in hardware, which simplifies the circuit. The system block diagram is shown in Figure 2. The signal processing part uses the TMS320F2812 DSP chip as the core of control and measurement; the signal conditioning part mainly completes the amplification, shaping and limiting of the signal; the standard frequency signal is generated by a 30MHz active crystal oscillator as a high-frequency standard filling pulse; communication with the host computer is achieved through the SCI module of the DSP, and the results are displayed on the host computer.

Figure 2 System Block Diagram

　　Frequency/Period Measurement
　　In the measurement of the frequency and period of the measured signal, the equal-precision measurement is based on the jump of the output level of the T1PWM pin when the DSP compares and matches as the opening and closing of the gate signal. Since the comparison match occurs on the rising edge of the measured signal, the gate time is synchronized with the measured signal. The schematic diagram is shown in Figure 3.

Figure 3 Principle of frequency measurement with equal precision

　　The clock input of general timer T1 selects the external timer clock. Here, the conditioned measured signal is used as the clock input of timer T1. The clock input of timer T2 selects the internal CPU clock to generate high-frequency standard filling pulses. When a comparison match event occurs in the general timer T1 in the F2812 on-chip EVA, the output signal of its comparison output pin T1CMP will automatically change the level state to generate a PWM wave. The capture unit CAP1 is set to rising edge capture. The rising edge of the PWM wave output by T1PWM is captured by CAP1, and the count value of timer T2 is read at this time. Similarly, the count value of timer T2 is read again at the next comparison match. By subtracting the two T2CNT values, the number of standard filling pulses within the gate time can be obtained, and then the frequency of the measured signal can be calculated.

　　Based on the jump of the output level of the T1PWM pin when the DSP compares and matches, the gate signal is turned on and off. Since the compare match occurs on the rising edge of the measured signal, the gate time is synchronized with the measured signal. The rising edges of the PWM waves generated by two adjacent compare matches are used as the gate signal opening and closing signals respectively. The number of measured signals is an integer and is set arbitrarily by ourselves. The clock input of timer T2 selects the internal CPU clock to generate standard filling pulses. Set the capture unit CAP1 to rising edge capture. When it captures the rising edge, it reads the value in the stack CAPFIFO. When it captures the next time, it reads the value in the stack again, calculates the number of standard filling pulses Ny, and ensures that the number of Ny is not less than a certain value, which can ensure that the gate time is greater than a certain value. Assuming that the total number of high-frequency filling pulses in a gate time is not less than n, when Ny>n, the timing period of timer T1 is increased, that is, the value of the timer T1 period register TIPR is increased. There is a formula T1PR+1=n/Ny. Since n/Ny is not necessarily an integer, if a

　　The basic principles of period measurement and frequency measurement are exactly the same. After measuring the signal frequency, the period of the measured signal can be obtained according to the formula T=1/f.

　　Error Analysis
　　The start and stop time of the timer T1 count are triggered by the rising edge of the signal. There is no error in counting the measured signal within one measurement time. The number of standard frequency pulses counted Ny within this time differs by at most one pulse, so the theoretical error is:

　　|d|≤1/Ny

　　Obviously, the measurement accuracy is only related to Ny. As long as the Ny value is large enough, the accuracy can be guaranteed.
 

hardware design

　　As shown in Figure 4, the measured signal is amplified by the high-speed operational amplifier OPA2690 and then shaped by the high-speed comparator TL3016 [3]. When the comparator shapes the low-frequency sine wave signal, the edge of the output waveform has serious jitter, which affects the measurement. The solution is to add positive feedback to the comparator to accelerate the signal edge and form a hysteresis loop, which can effectively eliminate the jitter. The shaped signal is limited and further shaped by the high-speed Schmitt trigger SN74LVC1G14. The measurement part mainly uses the clock input pin TCLKINA of the timer T1 on the DSP2812 chip, the comparison output pin T1PWM of the timer T1 and the input pin CAP1 of the capture unit CAP1 to complete the frequency measurement. The communication part selects MAX3221 as the RS-232 level conversion device, and communicates serially with the host computer through the 9-pin standard RS-232 port. The serial communication sending pin SCIRXD and serial communication receiving pin SCITXD of the DSP are mainly used.

Figure 4 Hardware circuit connection diagram

software design

　　The software design part mainly includes the following four parts:

　　· Initialization: configure variable parameters, system clock, PIE, EV, Flash, GPIO, etc.
　　· Interrupt module: SCI interrupt and timer T2, T3 overflow interrupt.
　　· Data processing module: segmentation + taking arithmetic mean.
　　· Output operation module: data is transmitted to the host computer via RS-232.

　　Figure 5 is a flow chart of the frequency and period measurement software, and Figure 6 is a flow chart of the overflow interrupt of timer 2.

Figure 5 Frequency and period measurement flow chart

Figure 6 Timer T2 overflow interrupt flow chart

　　When initializing this part, the following configurations need to be performed: the clock input of the general timer T1 is the external timer clock, and the clock input of the general timer T2 is the internal clock input, which is used to count the standard pulse. The standard pulse is provided by an external 30MHz active crystal oscillator; the capture unit 1 is set to rising edge capture, which is used to capture the rising edge of the PWM wave output by the T1PWM pin, and the count value T2CNT of the timer T2 is read at each comparison match, and this value is stored in the CAP1FIFO. During initialization, the FIFO stack state in the state register of capture unit 1 should be set to an empty stack; the timing period of timer T1 is set to the period length of four measured signals, and the frequency of the measured signal is calculated by measuring the number of standard pulses in one timing period of timer T1. Then, the measured signal is segmented into low frequency band (less than 46.875Hz), medium frequency band (greater than 46.875Hz, less than 2343.75KHz), and high frequency band (greater than 2343.75 KHz), where the segmentation is based on the count saturation value of the timer being 65536 and the count number being greater than or equal to 1. If the signal frequency is in the medium and high frequency bands, the registers of timer T1 and timer T2 are reconfigured to change the timing period and the number of high-frequency filling pulses in each gate time. The frequency and period are calculated in the next timing period of timer T1. In addition, the overflow number of timer T2 should be cleared when the comparison match occurs for the first time, and whether it is the first comparison match is determined by setting a flag. When the overflow count is cleared, the overflow count starts to be recorded until the second comparison match occurs.

Next improvement suggestions

　　The measurement error of this method mainly comes from the hardware part. The quality of the shaping circuit is directly related to the measurement accuracy. Therefore, our next step is to improve the shaping effect and anti-interference performance of the shaping circuit to minimize the error caused by signal shaping.

　　Since the DSP timer may be saturated when counting, there is an upper limit to the precision measurement, that is, when the measured signal frequency is higher than the frequency of the high-frequency filling pulse, this method cannot achieve the same precision. The following processing can be performed on the basis of this scheme: the number of measured signals in the timing period of timer T1 is fixed, T1PR can be set to 65529, and the clock of timer T2 is changed to 75MHz, so that the number of high-frequency filling pulses in each gate time can be guaranteed, thereby ensuring the accuracy when the frequency and period measurement of high-frequency signals is realized.

　　However, when the timer T1 clock input is selected as an external clock, there is a limit to the input range of the measured signal. If you want to further increase the range of the measured signal to hundreds of megahertz or gigahertz, you can consider the phase measurement method, set the measured signal to 360 degrees, and calculate the measured signal frequency based on the X-degree phase difference between the measured signal and the standard signal.

references:

　　1. Zhang Zhiwen, Tian Yingfeng, Research on high-precision frequency measurement system based on DSP, Journal of Xi'an University of Technology. 2007,
 27(2):167-170
　　2. Texas Instruments Incorporated. TMS320C28x DSP System Control And Interrupts Reference Guide. TEXAS INSTRUMENTS，July 2003
　　3. National Undergraduate Electronic Design Competition Organizing Committee, Collection of Award-winning Works of National Undergraduate Electronic Design Competition, Beijing Institute of Technology Press, 2004.8.169-216
　　4. Xu Kejun, Zhang Han, Chen Zhiyuan, TMS320X281x DSP Principle and Application, Beijing University of Aeronautics and Astronautics Press, 2006
　　5. Li Baoying, Zhao Yongsheng, Zu Longqi, Niu Yueling, Design of Equal-precision Frequency Meter Based on Single-Chip Microcomputer, Microcomputer Information (Embedded and SOC), 2007, 23(9-2):152-154