Introduction to the structure and principle of virtual oscilloscope spectrum analyzer F-24U

The USB digital storage oscilloscope/spectrum analyzer F-24U introduced in this issue is a new, miniaturized, portable virtual instrument that integrates a digital storage oscilloscope (DSO) and a spectrum analyzer (SA) in one, including video and audio signal ranges, and is equipped with powerful digital signal processing software. It can be used to measure various types of electrical signals, PAL video signals, NTSC video signals, computer digital signals, single-chip timing, sound, pulse, seismic waves, electrocardiogram, electroencephalogram, telephone, etc. It can also be used in the maintenance of computers, televisions, VCD/CD players, audio equipment, etc. and in various industrial measurement occasions.

In addition to the commonly used signal measurement and spectrum analysis functions, the F-24U can also use ready-made tools to process advanced data applications, such as capturing data of interest in the measurement, launching EXCEL spreadsheet software, importing text files containing channel data, generating charts, etc. Let's explore the internal structure and principle of the F-24U.

hardware design

The FlashDSO XP USB hardware principle block diagram is shown in Figure 1, which mainly includes signal conditioner, signal collector, data transmission module, clock generator, central processing unit module, USB communication controller and other modules. This article focuses on the signal conditioner, signal collector and data transmission module.

Signal Conditioner The signal conditioner module converts the external signal into the input signal of the signal collector. The schematic diagram is shown in Figure 2. It includes functions such as coupling mode, program-controlled attenuation, impedance conversion, and signal unipolar conversion
. The program-controlled attenuation part is controlled by a micro relay, which has the advantages of high voltage resistance, no resistance and noise interference, etc.

In Figure 2, the OP1 high-frequency amplifier acts as an emitter follower to increase the input impedance and provide signal buffering for the ADC analog-to-digital converter. OP2 and OP3 form an adder and an inverter. The input Vout1 is converted to the output Vout2, Vout2=Vout1+Vref. When Vref=2.5V, -2.5V

Signal collector The signal collector converts the analog signal output by the signal conditioner into a digital signal through an ADC high-speed analog-to-digital converter, and stores the signal in a high-speed static memory. The schematic diagram is shown in Figure 3. The U1 analog-to-digital converter converts the input signal into a digital signal, and writes the digital signal data into the U3 static memory through the U2 programmable logic device (CPLD). The OP1 zero-crossing comparator output signal serves as the TRIGER trigger signal of U2. The S0, S1, S2, and S3 pins of U2 serve as system clock frequency division selection switches, providing 11 frequency division coefficients, as shown in Table 1. At the same time, the T0 and T1 pins of U2 serve as signal trigger mode selection switches, providing three trigger modes, as shown in Table 2.

The data transmission module mainly receives the PC control software commands through the USB interface to control related modules, and sends the collected data back to the PC control software. The schematic diagram is shown in Figure 4, and the specific command set is shown in Table 3. [page]
software design

FlashDSO measurement and control software adopts multi-threaded software technology. The software flow chart is shown in Figure 5. At the same time, the command set in Table 3 is combined to complete the software control command. When the system starts, three threads are generated: data acquisition thread, data analysis thread, and device control thread. Shared memory is used to transmit data between threads.

The data acquisition thread mainly sends commands to the FlashDSO hardware device to transfer data to the shared memory of the PC, and at the same time notifies the data analysis thread to perform corresponding processing; the data analysis thread reads the data in the shared memory, and at the same time, according to the menu options of the digital storage oscilloscope software interface, performs corresponding processing through the amplitude-frequency response characteristics, phase-frequency response characteristics, autocorrelation analysis characteristics, and power spectrum analysis characteristics; the device control thread sets the sampling frequency, signal attenuation, coupling mode, trigger mode, etc. according to the selection menu of the software interface.

The F-24U (XP) spectrum analyzer is implemented using the FFT algorithm, with a frequency resolution of df = fs/N, where the sampling frequency fs is determined according to the sampling theorem and cannot be less than twice the highest frequency component in the signal; N is the FFT transformation length, which is usually 1024 based on comprehensive considerations of computing efficiency, memory space, and screen display points; the smaller the frequency resolution df, the higher the accuracy of the spectrum analysis, and this goal can be achieved by increasing the sampling length N or reducing the sampling frequency.