1 Introduction
Virtual instruments are computer-based instruments. The close integration of computers and instruments, and the construction of virtual instruments to replace complex and bulky analog instruments is the current trend of instrument development. Compared with traditional instruments, virtual instruments have obvious advantages in intelligence, processing power, cost-effectiveness, operability, etc. They can centrally manage scattered instruments and equipment, realize the automated management of production processes, improve production efficiency, and reduce costs.
2 System composition
This system design is a new type of virtual instrument test system, which is composed of a data acquisition system and a data communication subsystem. Its structural block diagram is shown in Figure 1. The data acquisition system is based on the C8051F120 single-chip microcomputer. The C8051F120 single-chip microcomputer is powerful and can realize accurate acquisition of target signals, digital filtering, and high-speed transmission of collected data to the host computer through the serial port RS-232. The host computer uses LabVIEW to complete data conversion, analysis, and display. The data acquisition system and the data communication system perform high-speed data communication through the RS-232 serial port, which is easy to plug and unplug. This virtual instrument test system breaks the constraints of virtual instrument development by software platforms such as LabVIEW.
2.1 Design of lower computer
2.1.1 Design of lower computer hardware
The data acquisition system converts the analog signals collected on site into digital signals, and performs operations such as processing, transmission, and storage. The data acquisition circuit is composed of embedded microprocessors, analog-to-digital converters, non-volatile memory and other devices. The data acquisition system uses the minimum power consumption design theory, can collect and record data under battery power, and can work for a long time. The
lower computer hardware design circuit is mainly composed of a high-performance C8051F120 microcontroller, A/D conversion interface circuit, human-machine interface circuit, serial communication circuit, power supply circuit, system reset circuit, A/D conversion voltage reference circuit, external clock circuit, JTAG interface circuit, etc. Its hardware circuit diagram is shown in Figure 2.
2.1.2 Design of each module of the lower computer
(1) C8051F120 microcontroller
The C8051F120 microcontroller is a fully integrated mixed-signal SoC (System on Chip)-level MCU device with a high-speed, pipelined structure that is fully compatible with the MCS-51 core and instruction set. The machine cycle is reduced from the standard 12 system clock cycles to 1 system clock cycle, with a peak value of up to 25 MI/s. In addition to the standard 8051 digital peripheral components, the chip integrates commonly used analog devices and other digital peripherals and functional devices in data acquisition and control systems, two full-duplex enhanced serial communication interfaces (UARTs), and a true 12-bit, 100 Ks/s successive approximation register (SAR) 8-channel ADC, which can fully meet the needs of high-speed, high-precision, multi-channel data acquisition, digital filtering, and data transmission. In addition, the chip also integrates a debugging circuit based on the JTAG protocol. Through the JTAG interface, the C8051F120 microcontroller flash memory can be read and written, as well as full-speed, non-intrusive in-system debugging.
(2) A/D conversion interface circuit
The input voltage of each channel of the ADC0~ADC1 subsystem of the C8051F120 microcontroller should be less than or equal to the reference voltage. The sensor signals are mostly weak current signals. According to the characteristics of the signal acquisition sensor, the sensor signal processing circuit, voltage conversion circuit and plug-in interface need to be designed at the channel interface.
(3) Human-machine interface circuit
The C8051F120 microcontroller is a 100-pin TQFP package with a standard 8051 port and an additional 4 8-bit I/O ports. This eliminates the need for interface devices to expand the I/O ports. The P0.2~P0.5 I/O ports are connected to light-emitting diodes, and the D1~D44 working status indicators are designed using a common cathode method. The P1.0~P1.3 I/O ports use key switches to design the KEY1~KEY4.4 data acquisition system control keys to achieve data acquisition, digital filtering and data transmission functions.
(4) Serial communication circuit
The C8051F120 microcontroller integrates two full-duplex enhanced serial communication interfaces (UART0 and UART1) that support the universal asynchronous protocol (UART protocol) and the synchronous protocol (SPI protocol). This system uses the UART protocol and completes the conversion of the microcontroller TTL level to the RS-232 level through the RS-232 interface device SP3223E, realizing the RS-232 serial port data communication between the C8051F120 microcontroller and the PC.
(5) Power supply circuit
This system is powered by a 220 V ~ 50 Hz, 5.5 VA / 5 V ~ 300 mA transformer. The circuit is converted into a 5 V stable voltage output through an inductor external power supply, and then the 5 V voltage is converted into a 3.3 V stable voltage (DV and AV) output through the silicon rectifier diode 1N4001 and the level converter AS1117 as the hardware system working power supply.
(6) System reset circuit
The reset circuit is designed at the RST pin of the C8051F120 microcontroller. The reset RST pin of the microcontroller is controlled to be low level by the charge and discharge of the capacitor, and maintained for more than 2 machine cycles. The C8051F120 microcontroller can be reset.
(7) Other circuits
The A/D conversion voltage reference circuit and the C8051F120 microcontroller A/D converter use an on-chip reference voltage. The circuit consists of a 1.2 V, 15 ppm/℃ (typical) bandgap voltage reference generator and an output buffer amplifier with a gain of 2. The internal reference voltage is connected to the external device of the application system through the VREF pin, and 0.1μF and 4.7μF bypass capacitors are connected between the VREF pin and AGND.
(8) External clock circuit The
C8051F120 microcontroller external clock is used. The crystal oscillator frequency is 18.432 MHz. The external clock is connected to the XTAL1/XTAL2 pins of the C8051F120 microcontroller by an external resonator, a parallel crystal, a capacitor, and a resistor. The JTAG interface circuit connects the C8051F120 microcontroller's on-chip JTAG boundary scan and debug circuit to the C8051F120 microcontroller development and debugging program download software and hardware tools.
(9) Temperature acquisition circuit
The temperature acquisition device DS18B20 from Dallas is used, which follows the one-line communication protocol. DS18B20 has high integration, only 3 pins, low power consumption, and a sampling temperature accuracy of up to 0.5°C. It is widely used in various dynamic parameter monitoring circuits.
2.1.3 Lower computer software design
The software flow chart of the lower computer software design is shown in Figure 3.
2.2 Host computer design
After power-on, the microcontroller collects data such as current, voltage, and temperature, and transmits them to the host computer through the serial port for analog signal display.
The programming environment of the host computer virtual instrument LabVIEW is divided into a front panel (panel) and a flowchart (block diagram). The front panel is divided into program control (input) and result display (output) parts, forming a VI front panel like the front panel of a traditional instrument. During the program running, the user controls and observes through the front panel, just like using an instrument. The code part of the program implementation is written in the flowchart using G language. The G language programming process mainly places icons representing functional modules (operators or VIs) in the flowchart, and the user connects the input/output of these modules according to the desired data transfer order and direction. The host computer software flowchart is shown in Figure 4.
The upper computer design includes the following key modules:
(1) Serial port connection path
The instrument itself supports communication with the computer. There is an appropriate connection path between the instrument and the computer. The computer supports this connection path in hardware. It uses a standard DB9 serial cable for connection and directly uses the serial port of the computer.
(2) Waveform operation module
The waveform function is located in Functions→All Functions→Waveform sub-template. In data acquisition, one waveform is to be collected from each channel. At this time, the data type output by the data acquisition function is a waveform array. After obtaining the waveform array, the array function is used to extract the waveform elements from the array, and then the waveform data is displayed.
(3) Application of the sampling theorem
According to the sampling theorem, the sampling frequency fs must be at least twice the highest frequency fm contained in the measured signal, so that the sampled data can contain all the information of all frequency components of the original signal. If the signal contains a component with a frequency higher than fs/2, the signal will be distorted between 0 Hz and fs/2. When the sampling frequency is too low, aliasing will occur because the signal frequency restored by the sampled data is different from the original signal.
3 Conclusion
This dynamic parameter monitoring system is used to test the signal of a new analog signal monitoring system developed by a company. It also provides a reference for measuring the performance parameters of the system, and requires further updating and improvement of the design. On-site tests and applications show that the system has the characteristics of high accuracy, reliable testing, simple and convenient operation, and intuitive expression of results.
The system breaks away from the dependence of virtual instrument development on software platforms such as LabVIEW and the constraints of data acquisition boards such as PCI bus, and has certain innovation and high practicality.
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