How to Select a System Interface for Digital Temperature Sensors

Thermistors, thermocouples, analog silicon temperature sensors , and nickel/platinum resistance temperature detectors (RTDs) require calibration to achieve the required temperature accuracy. Digital temperature sensors, as mixed-signal devices, do not require calibration. They have integrated digital logic, an operating temperature range of -55°C to 50°C, and use a proportional absolute temperature (PTAT) circuit to measure local/remote temperature by detecting changes in the base-emitter voltage (VBE) of a diode. It has simple integrated hardware to save temperature values ​​and program temperature set points, device operating modes, sleep modes, and fast/slow conversion rates. Data is communicated via the inter-IC bus (I ² C bus), system management bus (SMBus), or serial peripheral interface (SPI). In fact, each device is trimmed during production, and the temperature detection accuracy is within ±0.5°C or better, with high cost performance and reliability. These advantages make digital temperature sensors popular in almost any conceivable application, including PCs, communications equipment, handheld devices, and industrial control equipment. Specifically, the main components of a digital temperature sensor include a dual current source, a delta-sigma A/D converter, digital logic, and a serial interface (such as I2C bus, SMBus, or SPI) leading to a digital device (such as a microprocessor or microcontroller). There are two types of digital temperature sensors: local or remote temperature sensors. Both use some method to force two proportional currents through an NPN or PNP transistor connected in the form of a diode. Both are used to measure the resulting VBE change. The voltage is sampled and converted into a digital format using a delta-sigma A/D converter. The forced currents are generally in a ratio of about 10:1. By forcing proportional currents and measuring the difference between the two VBEs, the first-order effect of the process-related parameter IS on the diode is eliminated. Each temperature sensor is adjusted during the production process to match the ideal parameters of the diode to be used. The characteristics of the remote diode are taken from the 2N3904/6. Since the local temperature sensor is just a simple NPN or PNP structure on the silicon substrate, the remote temperature sensor almost always integrates a local temperature sensor. Therefore, the remote sensor almost always acts like two sensors. The local temperature sensor integrates a thermal diode in the same package. For local sensors, the thermal time constant (i.e., the time required to reach 63.2% of the final temperature) is several minutes, depending on the package and the local diode located on the IC substrate. Heavy bus loads or too fast conversions can cause the device to self-heat and affect temperature accuracy. The time required for temperature data to become available is called the conversion rate. This rate is determined by the device's internal oscillator and the A/D resolution and is typically less than 100Hz or longer than 10ms. The faster the conversion rate, the faster the temperature data can be retrieved, and the more power the temperature sensor consumes. The conversion rate is usually slow due to the self-heating effect. Figure 1 shows a simplified block diagram of a remote temperature sensor and/or local temperature sensor.

Figure 1: Simplified digital temperature sensor block diagram

Advantages of I2C Bus or SMBus Temperature Sensors

The most popular digital temperature sensors are those with a serial bus interface. The choice of temperature sensor bus depends largely on what interfaces are available on the selected microprocessor or controller. The choice of controller depends on how much experience the engineer has with it. For system data that needs to be frequently streamed, SPI is the first choice because it has a faster clock rate, which can range from a few megahertz to tens of megahertz. However, for system management activities such as reading temperature sensor readings and querying the status of multiple slave devices, or when multiple master devices need to coexist on the same system bus (system redundancy often requires this), or for low-power applications, I2C or SMBus will be the preferred interface. The following sections will introduce each serial bus and its advantages and disadvantages.

1. SPI

SPI is a four-wire serial bus interface with a master/slave structure. The four wires are serial clock (SCLK), master output slave input (MOSI), master input slave output (MISO) and slave select (SS) signals. The master device is the clock provider and can initiate a read or write slave device operation. At this time, the master device will talk to a slave device. When there are multiple slave devices on the bus, to initiate a transmission, the master will pull the slave select line low and then start data transmission or reception through the MOSI and MISO lines respectively.

The SPI clock speed is very fast, ranging from a few megahertz to tens of megahertz, and there is no system overhead. The disadvantage of SPI in system management is the lack of flow control mechanism. Neither the master nor the slave confirms the message, and the master cannot know whether the slave is busy. Therefore, a clever software mechanism must be designed to handle the confirmation problem. At the same time, SPI does not have a multi-master device protocol, and very complex software and external logic must be used to implement a multi-master device architecture. Each slave device requires a separate slave select signal. The total number of signals is ultimately n+3, where n is the number of slave devices on the bus. Therefore, the number of wires will increase in proportion to the number of slave devices added. Similarly, it is not convenient to add new slave devices to the SPI bus. For each additional slave device added, a new slave select line or decoding logic is required. Figure 2 shows a typical SPI read/write cycle. A read/write bit follows the address or command byte. Data is written to the slave device through the MOSI signal and read from the slave device through the MISO signal. Figure 3 shows the system block diagram of the I2C bus/SMBus and SPI.

Figure 2: SPI typical read/write cycle

Figure 3: (a) I2C bus/SMBus system interface; (b) SPI system interface

2. I2C bus

I2C is a two-wire serial bus interface that works in master/slave mode. The two-wire communication signals are open-drain SCL and SDA serial clock and serial data respectively. The master device is the clock source. Data transmission is bidirectional, and its direction depends on the state of the read/write bit. Each slave device has a unique 7 or 10-bit address. The master device initiates a transmission through a start bit and terminates a transmission through a stop bit. The start bit is followed by a unique slave device address, followed by the read/write bit.

The I2C bus speed ranges from 0Hz to 3.4MHz. It is not as fast as SPI, but it is ideal for system management devices such as temperature sensors. I2C has system overhead, which includes start/stop bits, confirmation bits, and slave address bits, but it has a flow control mechanism as a result. The master device always sends an confirmation bit when it has finished receiving data from the slave device, unless it is ready to terminate the transmission. The slave device always sends an confirmation bit when it receives a command or data from the master device. When the slave device is not ready, it can hold or stretch the clock until it is ready to respond again.

I2C allows multiple masters to operate on the same bus. Multiple masters can easily synchronize their clocks so all transmit using the same clock. Multiple masters can detect which master is using the bus through data arbitration, thus avoiding data corruption. Since the I2C bus has only two wires, new slaves can simply be connected to the bus without additional logic. Figure 4 shows a typical I2C bus read/write operation.

Figure 4: Typical read/write operation of I2C bus/SMBus

3. SMBus

SMBus is a two-wire serial bus, and the first version of the specification was commercialized in 1996. It is largely based on the I2C bus specification. Like I2C, SMBus does not require additional pins. The bus was created mainly to add new features, but it only operates at 100kHz and is specifically targeted at smart battery management applications. It works in master/slave mode: the master device provides the clock, provides a start bit when it initiates a transmission, and provides a stop bit when it terminates a transmission; the slave device has a unique 7 or 10-bit slave address.

There are some differences in timing characteristics between SMBus and I2C buses. First, SMBus requires a certain data hold time, while the I2C bus extends the data hold time internally. SMBus has a timeout function, so when SCL is too low for more than 35 ms, the slave device will reset the ongoing communication. In contrast, I2C uses hardware reset. SMBus has an alert response address (ARA), so when a slave device generates an interrupt, it does not clear the interrupt immediately, but keeps it until it receives an ARA containing its address sent by the master device. SMBus only operates from 10kHz to a maximum of 100kHz. The minimum operating frequency of 10kHz is determined by the SMBus timeout function.