This article focuses on specific considerations for specific end applications, starting with the FET that will be used to drive the motor in the end application. Motor control is a large and rapidly growing market for 30V-100V discrete MOSFETs, especially for the many topologies driving DC motors. Here, we will focus on how to choose the right FET to drive brushed, brushless, and stepper motors. While there are few hard and fast rules and there are probably countless approaches, hopefully this article will give you an idea of where to start based on the end application.
The first and probably easiest choice to make is what type of breakdown voltage you need. Since motor control tends to be lower frequency and therefore has lower ringing than power applications, the margin between the input supply rail and the FET breakdown can be more aggressive (usually at the expense of using a buffer) to get a lower resistance FET. But generally speaking, a 40% buffer between BVDSS and the maximum input voltage, VIN, is not a bad rule - 10% more or less depending on how much ringing you expect and how much you are willing to dampen that ringing with external passive components.
Choosing the package type is perhaps the most critical decision, and is entirely dependent on the power density requirements of the design (see Figure 1). Below 2A, FETs are often (but not always) absorbed into the driver integrated circuit (IC). In stepper motors and low-current brushed and brushless applications below 10A, small-footprint PQFN devices (SON 2mm x 2mm, SON 3.3mm x 3.3mm) offer the best power density. If you prioritize low cost over higher power density, then the old SOIC-type package will do the job, but will inevitably take up more space on the printed circuit board (PCB).
Figure 1: Various package options for driving different motor currents (packages not shown to scale)
The 10A-30A space occupied by small battery-powered tools and household appliances is the best choice for 5mm×6mm QFN. Beyond that, higher current power and garden tools tend to connect multiple FETs in parallel, or use large package devices such as D2PAK or through-hole packages such as TO-220. These packages can accommodate more silicon, thereby reducing resistance, increasing current capability, and optimizing thermal performance. Mounting a through-hole package on a large heat sink allows for more losses and can dissipate more power.
How much power the device can dissipate also depends on the thermal environment of the end application and the thermal environment of the FET package. Although surface-mount devices are typically heatsinked through the PCB, you can connect other packages such as the TO-220 mentioned above or TI’s DualCool™ Power Module devices (Figure 2 below) to a heat sink to draw heat away from the board and increase the maximum power the FET can dissipate.
The final consideration is the resistance you face. In some ways, choosing a FET to drive a motor is simpler than choosing a FET for a power supply because the lower switching frequency dictates that conduction losses dominate the thermal performance. I am not saying that conversion losses can be completely ignored in PLOSS estimates. On the contrary, we have seen a worst-case scenario where switching losses can account for 30% of the total PLOSS of the system. However, these losses are still secondary to conduction losses and should not be your primary consideration. Power tools designed around very high stall currents will often push the FET to its maximum thermal tolerance, so the lowest resistance device in your chosen package is a good starting point.
Before concluding, I would like to revisit the power stage devices described earlier. The 40VCSD88584Q5DC and 60VCSD88599Q5DC are two vertically integrated half-bridge solutions in a single 5mm×6mm QFN DualCool package (see Figure 2). These devices double the low resistance per unit footprint provided by traditional discrete 5mm×6mm devices while providing an exposed metal top for heat sink application, making them ideal for handling higher currents (40A or more) in space-constrained applications.
Figure 2: Stacked chip power module mechanical failure
Before going for a larger TO package for your design, run the numbers on one of these power modules to see if you can save on both PCB footprint and heat sink size.
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