[Original Tips] Why can't vias be drilled on pads? I want to drill them, but what should I do?
Why can't vias be punched on pads? I want to punch them, but what should I do? Many novices often have this problem when they first come into contact with PCB. Because the board space is too small and the devices are densely packed, the space is narrow and it is impossible to fan the holes. Usually, they will choose to punch vias on pads. Although this makes it much easier to connect, it is often unclear what kind of problems will occur on the board? Can it be punched this way?
In order to make this issue clearer, we will explain it from the following two aspects:
1) Why can’t vias be drilled on pads?
2) Under what circumstances can vias be drilled on pads?
1. Why can’t vias be punched on pads?
In the early days , when designing PCBs , it was not allowed to have vias on BGA pads . The main reason was that the leakage of tin would lead to insufficient solder paste on the pads, which would cause the device to be cold-soldered or desoldered during soldering . Therefore, the holes on the device were usually made by first leading out the wires and then drilling .
At present , due to the continuous shrinkage of BGA spacing , the use of resin plugging will prevent tin leakage , but the vias are punched on the pads, which may cause cold soldering or fall off, increase costs, and affect the appearance of the PCB board, so it is generally not recommended.
The "tombstone" phenomenon often occurs during the reflow soldering of CHIP components (such as chip capacitors and chip resistors). The smaller the component, the more likely it is to occur, such as small chip components such as 0201 and 0402. During the reflow soldering process of the surface mount process, the chip components produce the phenomenon shown in the figure, because a section of the component is lifted up and desoldering occurs. Due to this situation, it is generally figuratively called the "tombstone" phenomenon.
The "tombstone" phenomenon occurs because when the solder paste on the pads at both ends of the component is reflowed and melted, the surface tension of the two ends of the component is unbalanced, and the end with greater tension pulls the component to rotate along its bottom. The same is true for some small-package chip resistors and capacitors. The reason why it is best not to punch vias on the pads is the same. If the vias are punched on the edge of the pad, the tombstone phenomenon is likely to occur due to inconsistent tension at both ends of the pad.
2. Under what circumstances can vias be drilled on pads?
1) Buried and blind vias
Generally speaking, when the BGA pitch is less than or equal to 0.5mm, it is difficult to fan out the BGA. In this case, blind and buried vias can be used to solve the problem.
Blind vias : Blind vias are a type of via that connects the inner layer traces of a PCB to the surface layer traces of a PCB. This hole does not penetrate the entire board. For example, it only goes from the surface layer to the third layer in the middle.
Buried vias : Buried vias are a type of via that only connects the traces between inner layers, so they cannot be seen from the surface of the PCB.
Since the blind hole only penetrates the surface layer to the inner layer and does not penetrate the entire PCB, it will not cause tin leakage. The buried hole is directly drilled from the inside, so there is no such worry. The only problem is that from the cost perspective, the process manufacturing cost of buried blind holes will be greatly increased.
2) Heat dissipation vias
In PCB design, we often see the design shown in the figure below. It is common in the recommended design of the chip, which requires that a via be drilled on the thermal pad . In this case, the thermal via is drilled to dissipate heat for the IC. Since there are no pins that need to be soldered in the middle of the chip body, there is no need to consider tin leakage, cold soldering and other issues in the via on the IC thermal pad.
This is an original technical article from Wenfanyi Education. Please indicate the source when reprinting !