Renesas Electronics Introduces RXv3 CPU Core with Industry-Leading Performance, Dramatically Improving Performance in New 32-bit RX MCU Family

RXv3 core achieves 5.8 CoreMark/MHz, delivering the highest embedded processing performance and power efficiency

Tokyo, Japan, October 25, 2018 – Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced the development of the third generation 32-bit RX CPU core, the RXv3. The RXv3 CPU core will be used in Renesas’ new RX microcontroller (MCU) family, which will be launched in late 2018. The new MCUs are designed to meet the real-time performance and enhanced stability required for motor control and industrial applications in next-generation smart factories, smart homes, and smart infrastructure.

The innovative RXv3 core significantly improves the performance of the proven Renesas RX CPU core architecture, achieving up to 5.8 CoreMark®/MHz performance (as measured by the EEMBC® benchmark), providing industry-leading performance (note), power efficiency, and responsiveness. The RXv3 core is backward compatible with the RXv2 and RXv1 CPU cores in Renesas' current 32-bit RX MCU family. Binary compatibility ensures that applications written based on the previous generation RXv2 and RXv1 cores can continue to work on RXv3-based MCUs, thanks to the same CPU core instruction set. Designers working on MCUs based on the RXv3 core can leverage the powerful Renesas RX family development ecosystem to develop their own embedded systems.

“The RXv3 features cutting-edge core technology targeting a broad range of embedded applications in the Industrial IoT era, where increasing system complexity places higher demands on performance and power efficiency,” said Daryl Khoo, Vice President of Product Marketing, IoT Platform Business Unit at Renesas Electronics. “The EEMBC CoreMark/MHz processor benchmark clearly demonstrates that the RXv3 core is the highest performing CPU core in its class today. Once again, Renesas is delivering exceptional MCU performance and power efficiency for our customers’ next-generation embedded systems.”

This unique RX CPU core combines optimized power-efficient design with advanced manufacturing processes to achieve outstanding performance. The new RXv3 CPU core is based on the CISC (Complex Instruction Set Computer) architecture, which has a clear advantage over the RISC (Reduced Instruction Set Computer) architecture in terms of code density. The RXv3 uses the instruction pipeline to provide high-instruction-period (IPC) performance comparable to RISC. Based on the mature RXv2 architecture, the new RXv3 core has an enhanced instruction pipeline, multiple options for register bank save functions, and double-precision floating-point unit (FPU) capabilities to achieve the best computing performance, power consumption, and code efficiency.

● The enhanced RX core five-stage superscalar architecture enables the instruction pipeline to execute more instructions simultaneously while maintaining excellent power efficiency.

● The RXv3 core will enable the first new RX600 MCUs to achieve energy efficiency of 44.8 CoreMark/mA, using an energy-efficient cache design to reduce access time and power consumption when reading on-chip flash memory (such as fetching instructions).

● The RXv3 core significantly reduces interrupt response time through a new single-cycle register save option

● By using dedicated instructions and a saved register bank with up to 256 banks, designers can minimize the interrupt handling overhead required to run embedded systems in real-time applications such as motor control

● With the help of register bank saving function, RTOS process context switching time can be shortened by up to 20%

● Model-based development (MBD) methods have penetrated into various application development; using DP-FPU can help reduce the amount of work required when porting high-precision control models to MCUs

● Similar to the RXv2 core, the RXv3 core performs DSP/FPU operations and memory access simultaneously, greatly improving signal processing capabilities

Renesas plans to begin shipping RXv3-based MCU samples by the end of the fourth quarter of 2018. For more information on the new RXv3 core, press and hold the QR code below.