This week, Nokia announced that it will cooperate with Broadcom to develop 5G chips, creating customized chipsets including processors for its 5G products to diversify its supply chain. More importantly, the main reason for this cooperation is that Nokia hopes to accelerate the transformation of its 5G chips from more expensive FPGAs to custom ASICs. In the third quarter 2019 earnings call, Nokia admitted that the high cost of its "ReefShark" chipset weakened the profit margins of 5G telecommunications equipment.
2019 is the first year of 5G commercialization. The number of base stations was relatively limited at the beginning. In particular, South Korea, as the first region in the world to realize 5G commercialization, has a limited capacity for 5G due to its land and population. But before long, countries and regions led by China also realized commercialization, which led to an explosive growth of 5G base stations in a relatively short period of time. This trend is also transmitted to the upstream chips of the industry chain. One of the results is the above experience of Nokia: FPGA does not seem to be so easy to use.
For communication base stations, they are usually composed of hundreds of chips, which are responsible for implementing different functions. Simply put, the base station transmits and receives signals. After receiving the signals, there must first be a chip to filter and stabilize the signals, and then a chip to amplify the small signals, and then another chip to analyze and process them, and then transmit and distribute them.
Generally speaking, telecom base stations can be divided into several parts, including baseband processing unit (BBU), radio frequency unit (RRU), and antenna. BBU is responsible for centralized control and management of the entire base station system, completing uplink and downlink baseband processing functions, and providing physical interfaces with RRU and transmission networks to complete information exchange.
In the 5G era, AAU (Active Antenna Unit) advocated by telecom equipment manufacturers represented by Huawei is becoming an industry trend. Its essence is to integrate RRU into the antenna, thereby improving the integration of communication equipment and significantly reducing its size.
5G base stations have a love-hate relationship with FPGAs
Compared with 4G, in order to enhance signal coverage and spectrum efficiency, 5G introduces Massive MIMO technology. In this way, the number of transceiver channels is increased from 16Tx16R to 64Tx64R or even 128Tx128R. In order to reduce interference and suppress noise, the signal received by each antenna unit needs to be digitally processed, which generates a large amount of computing load in adaptive beamforming.
If traditional CPU and DSP are used, it will lead to excessive load. FPGA has advantages in I/O, operation speed and delay. In multi-channel beamforming, FPGA is more flexible than ASIC solution. In addition, the base station is mainly responsible for implementing the protocol part of the physical layer and logical link layer in the communication protocol. This part is upgraded every year and is more suitable for FPGA to implement.
Therefore, in the early stages of 5G development, when the total number of base stations was not large, the programmable and flexible advantages of FPGA were obvious.
By programming the FPGA, any logical function that an ASIC performs can be executed. This feature can reduce product costs and risks when the technology is not yet mature, and this feature is particularly important in the early stages of 5G. In addition, FPGAs can be used directly after programming, without having to wait for a chip tape-out cycle of three months to one year, which helps companies gain time to market for their products. Furthermore, ASICs have fixed costs, while FPGA solutions have almost none. When the usage is small, the FPGA solution does not need to pay a one-time tape-out fee of up to millions of dollars, nor does it have to bear the risk of tape-out failure. At this time, the cost of the FPGA solution is lower than that of ASIC, but as the usage increases, the cost advantage of the FPGA solution gradually shrinks. After exceeding a certain usage, the ASIC solution has more cost advantages due to the economies of scale generated by a large number of tape-outs.
Starting from 2020, especially in 2021, the number of 5G base stations will enter an explosive stage. Since FPGA is mainly used in the baseband of transceivers, in the 5G era, due to the increase in the number of channels, the computational complexity will increase accordingly, and the scale of the FPGA used will also increase. Since the pricing of FPGA is positively correlated with on-chip resources, the cost of a single FPGA in the future communications field will also rise. At present, the unit price of FPGA in base station transceivers is usually in the range of several hundred yuan, and it is expected to increase further in the future. The main cost and power consumption of the transceiver are contributed by the baseband part. In the future, the complexity of technology will once again push up the cost of the transceiver, which does not seem to be good news for FPGA.
For example, the NRE cost (including IP licensing, development and productization) to develop a 16nm FinFET process ASIC is about $18 million, and the unit cost (based on chip size, packaging, and test time) is about $6.20. The NRE cost to develop a 22nm/28nm process ASIC is about $14 million to $15 million, and the unit cost is about $9.50.
If an FPGA solution is adopted, such as Xilinx's UltraScale+ (single unit price at Digi-Key is $975), the solution has no NRE and the expected volume cost is about $30-50. Assuming 1 million devices are produced per year, the 16nm FinFET device is most cost-effective after 13 months.
With the move to more advanced process technologies (such as 10nm), the NRE costs of PHY, ADC, and DAC will change dramatically. If 7nm is used, the cost will be even higher. Although digital chips for 5G require processes from 7nm to 40nm, it is worth noting that the performance of ASICs is roughly the same as that of FPGAs that are scaled down by one or two process nodes. With this in mind, 22nm/28nm ASICs will provide similar logic performance to 16nm FinFET FPGAs, thereby reducing costs and power consumption for 5G applications.
As a result, Nokia underwent the transformation described above.
Customized processors are becoming popular
This time, Nokia announced that it will cooperate with Broadcom to develop 5G base station ASIC, which undoubtedly sent a clearer signal: dedicated chips still have a bright future.
Prior to this, Nokia also had in-depth cooperation with Intel and Marvell, and both adopted non-FPGA solutions.
Just in March of this year, Intel entered the 5G base station chip market with great force and released the 10nm process 5G base station chip Atom P5900, which is a general-purpose CPU customized for base stations. The Atom P5900 adopts the SoC approach and provides a standard technology platform that connects hardware, chips, and software. Intel has matched the P5900 with a new generation of structured ASIC acceleration chips, which is more conducive to giving play to the advantages of high-speed processors. In addition to 5G base station chips, Intel has also launched 5G products for 5G network acceleration, edge optimization, and virtualization, involving 5G core networks, access networks, edges, and base stations.
Marvell has launched products represented by the OCTEON Fusion series of processors, which are suitable for macro base stations, micro base stations, split radio devices and distributed unit solutions. This series of processors is aimed at 2G, 3G, 4G and 5G NR wireless networks.
As for Broadcom, due to its many years of technological accumulation and advantages in network communication processors, and the company is also a major supplier of RF chips, the company has certain advantages in future 5G devices with increasingly higher requirements for integration.
In addition, Huawei HiSilicon is also developing its own 5G base station chips, especially the Huawei Tiangang chip, which can greatly improve the performance of AAU, enable lightweight base station deployment, and reduce equipment size by more than 50%; while the weight is reduced by 23% and power consumption is reduced by 21%.
Nokia's troubles and urgency
The above is the impact of changes in the 5G base station market environment on FPGA and ASIC. In addition, Nokia's industry position has also prompted it to do everything possible to improve its competitiveness.
Statistics from Dell'Oro show that in the first quarter of 2020, the global communications equipment market share rankings were: Huawei (28%), Nokia (15%), Ericsson (14%), ZTE (11%), and Cisco (6%).
Compared with 2019, Huawei, Nokia and Cisco all fell by 1 percentage point, Ericsson remained the same, and ZTE grew by 1%. In addition, in the first quarter of this year, the mobile core network equipment market grew by 10% compared with the same period last year.
It can be seen that although Nokia ranks second, its market share is on a downward trend (as shown in the figure above), and its market share is only one percentage point higher than Ericsson, while ZTE, which ranks fourth, is rising rapidly. All these have brought great pressure to Nokia.
To improve competitiveness, reducing chip costs is very important for Nokia at present. The company's Q1 2020 financial report shows that reducing chip costs is its key tracking KPI. In the first quarter of 2020, 17% of Nokia's 5G devices shipped used customized chips. The company plans to increase this proportion to more than 35% by the end of 2020, and eventually achieve 100% of 5G products using customized chips by the end of 2022.
Although the development of 5G has enhanced the status of ASIC, it does not mean that FPGA has withdrawn from the historical stage of base stations. Under the complex applications and market demands, various chips have their value in existence and application.
Taking Huawei as an example, the company's outdoor wireless base station RRU3908, the ADC and DAC single-bit stream decoding and encoding of the central processing unit are still implemented by Altera Cyclone III FPGA and customized Huawei SD6151RBI controller.
In addition, the new generation of eFPGA (embedded FPGA) architectures from companies such as Achronix and Flex Logic provide a third way to implement the flexibility of FPGA logic in custom ASICs. Typically, these solutions only provide thousands of logic elements per square millimeter of silicon, so using them can achieve the power and cost savings of some ASICs.
*Disclaimer: This article is originally written by the author. The content of the article is the author's personal opinion. Semiconductor Industry Observer reprints it only to convey a different point of view. It does not mean that Semiconductor Industry Observer agrees or supports this point of view. If you have any objections, please contact Semiconductor Industry Observer.
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