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Samsung bets on advanced packaging!

Latest update time:2023-03-26
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Source: The content is compiled from businesskorea by Semiconductor Industry Observer (ID: i cbank), thank you.


Samsung Electronics established the Advanced Packaging (AVP) organization in December last year to be responsible for packaging technology and product development. The South Korean semiconductor giant announced its goal to push the limits of semiconductors with advanced packaging technology.


"Our AVP business team will create products that do not exist in the world today," Kang Moon-soo, vice president of Samsung Electronics' AVP business team, said in a March 23 release.


State-of-the-art packaging technology enables more transistors to be integrated into smaller semiconductor packages through heterogeneous integration technology that connects multiple semiconductors horizontally and vertically. This delivers powerful performance beyond every performance.


“Samsung Electronics is the only company in the world that is in the memory, logic foundry and packaging business,” Kang said. "By leveraging these advantages, we will provide competitive packaging products that connect high-performance memory semiconductors such as state-of-the-art logic semiconductors and high-bandwidth memories (HBM) manufactured through EUV processes through heterogeneous integration technology."


“We will communicate directly with customers and commercialize advanced packaging technologies and solutions customized for their needs and products,” Kang added. “We will focus on developing next-generation 2.5D and 3D advanced packaging solutions based on redistribution layer (RDL), silicon interposer/bridge and through silicon via (TSV) stacking technologies.”


From 2021 to 2027, the advanced packaging market is expected to achieve a high annual growth rate of 9.6%. Among them, the 2.5-dimensional and 3-dimensional packaging market using heterogeneous integration technology is expected to have an annual growth rate of more than 14%, faster than the entire high-tech packaging market.


A package used in the past to simply electrically connect a chip to the outside and protect it. But now, packaging is expanding its role to supplement parts that are difficult to achieve with chips.


In particular, semiconductor manufacturers are developing a new fusion packaging technology to overcome existing technology limitations. Since the release of HBM2 high-bandwidth memory in 2015, Samsung Electronics has successively implemented packaging stacking technology innovations such as I-Cube (2.5D) in 2018 and X-Cube (3D) in 2020.


Samsung Electronics plans to mass-produce X-Cube (u-Bump) that can handle more data than a regular bump in 2024, and launch a bumpless X-Cube that can handle more data than an X-Cube (u-Bump) in 2026. .


*Disclaimer: This article is original by the author. The content of the article is the personal opinion of the author. The reprinting by Semiconductor Industry Watch is only to convey a different point of view. It does not mean that Semiconductor Industry Watch agrees or supports the view. If you have any objections, please contact Semiconductor Industry Watch.


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