Kioxia Talks About the Future of 3D NAND Flash Technology
Latest update time：2021-09-28 17:37
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Readers familiar with the storage industry should know that Toshiba's Fujio Masuoka invented NAND flash memory in 1987. Since then, this type of storage product has flourished in the market, and in the era of smartphones, NAND Flash has become even more popular.
According to ChinaFlashMarket, the global NAND Flash market sales in 2020 will exceed US$55 billion, a 21% increase from 2019, and the global NAND Flash GB equivalent will reach 400 billion GB equivalent, an annual increase of 31%. A large part of this is contributed by smartphones.
However, in recent years, due to the large fluctuations in the smartphone market, many people have questioned the future of NAND Flash. But in the view of Kioxia, which was established after the name change of Toshiba's storage business, the NAND Flash market still has a promising future.
On the one hand, although it is an indisputable fact that smartphones are weakening in the short term, in the long run, driven by 5G, the demand for flash memory in smartphones will continue to grow; on the other hand, the emergence of the epidemic has changed the way people work and live, and coupled with the current wave of technological development, the demand for data centers will inevitably increase, which is bound to drive the demand for flash memory; third, as cars evolve to higher levels of autonomous driving, there will naturally be a demand for higher-capacity flash memory.
These are also the three major storage opportunities that Kioxia is optimistic about. As industry-leading experts, they have made comprehensive plans in terms of production capacity and technology.
First of all, let's look at the technology, which is the foundation of Kioxia's survival. Only with these, Kioxia will have the confidence to face the future. When talking about Kioxia's flash memory technology, BiCS must not be missed, because it is the foundation of all Kioxia's flash memory technologies.
Official data shows that this is the 3D flash memory technology they launched in 2007. In May this year, it was upgraded to the sixth generation. According to reports, this is a 162-layer 3D flash memory technology. It is their highest density and most advanced 3D flash memory technology to date, using a wide range of technical and manufacturing innovations.
This sixth-generation 3D flash memory has an advanced architecture that goes beyond the traditional eight-column storage hole array, and the planar cell array density is increased by up to 10% compared to the fifth-generation technology. This advance in planar miniaturization is combined with 162 layers of vertical stacking, and the die size is reduced by 40% compared to 112-layer stacking technology, thereby optimizing costs.
Kioxia and Western Digital teams also applied Circuit Under Array CMOS configuration and 4Plane operation, which improved write performance by nearly 2.4 times and reduced read latency by 10% compared to the previous generation. In addition, I/O performance was also improved by 66%, enabling the next-generation interface to support the growing demand for faster transfer rates.
Overall, the new 3D flash memory technology reduces the cost per bit and increases the number of bits that can be manufactured per wafer by 70% compared to the previous generation. Kioxia and Western Digital will continue to drive innovation, ensuring continued miniaturization to meet the needs of customers and their diverse applications.
Judging from the development of Kioxia BiCS, or 3D flash memory from Samsung, Micron or Intel, manufacturers are now pursuing higher layers and developing flash memory from a vertical direction. But as Kioxia said, although industry experts pointed out that 3D flash memory can be stacked up to 1,000 layers, the cost and time of manufacturing flash memory will increase as the number of stacked layers increases. For this reason, they have also begun to explore the horizontal development of 3D flash memory.
In his speech at the Flash Memory Summit, Kioxia Corporation's technical executive officer, Maozhi Yanagi, also said: "Some people may think that the number of stacking layers is the most important parameter for 3D NAND capacity growth, but this is not entirely correct. There is no need to blindly increase the number of stacking layers at the expense of increasing thickness." He further pointed out that Kioxia also pays great attention to improving planar density. "Until BiCS 5 flash memory chips, Kioxia has adopted a CNA structure, that is, the CMOS circuit is arranged next to the storage array, because this structure can minimize production time and optimize wafer fab output." Maozhi Yanagi emphasized.
But when it comes to the BiCS6 162-layer flash memory chip, Kioxia began to use the CUA structure in which the CMOS circuit is configured under the storage array. It is understood that the chip thickness of this design will be greater than the CAN structure, but Kioxia said that the increase in the number of chips produced from a single wafer can make up for the impact of longer production time. Looking to the future, Kioxia will also introduce the CBA structure, that is, CMOS/storage array bonding, and the storage array and peripheral circuits will be produced separately. Finally, the two wafers are bonded together to form a memory chip.
In addition, PLC and Twin BiCS are also important ways for Kioxia to improve planar storage density.
The so-called PLC is the abbreviation of penta level cell, which is a design that stores 5 potentials. But Kioxia is not satisfied with this. In the previous academic conference, Kioxia also talked about HLC (hexa level cell) that stores 6 potentials and OLC (octa level cell) that stores 8 potentials.
As for Twin BiCS, it is a new flash memory technology launched by Kioxia in 2019. It is reported that this is the world's first 3D semicircular split floating gate flash memory cell. The technologies used mainly include semicircular, split, and floating gate. Simply put, the traditional floating gate is split into two symmetrical semicircular gates, and the curvature effect is used to improve the performance of the flash memory P/E programming/erasing process.
At the academic conference, Kioxia also talked about a concept called wafer-level SSD, hoping to use the entire wafer produced as an SSD hard drive.
But we must emphasize that the above ideas of Kioxia are their ideas for the future of technology, and they are only in the initial stage. But through these "fantastic ideas", we see the infinite possibilities of flash memory.
Based on the above flash memory technology and products, Kioxia has created a rich product line for markets such as smartphones and data centers. For example, there are UFS series products for smartphones; SAS SSD, PCIE Gen 4 SSD, EDSFF E3S and E1S SSD and low-latency SSD for enterprise applications. Kioxia will also launch the CD7 series of enterprise-level SSDs that support PCIe Gen5 and EDSEF E3.S interfaces in the fourth quarter of this year; for the automotive market, in addition to planning UFS products, Kioxia said that in order to meet the higher capacity requirements of automobiles, the company is discussing the application of SSDs in automobiles with partners.
Having leading products is important, but whether there is proper capacity planning is the key to the success of storage companies. And they are indeed fully prepared for the current market status and trends.
According to data from ChinaFlashMarket, in the first half of this year, Kioxia accounted for about 19% of the global NAND Flash market share, ranking second. From the introduction of Kioxia's technical executive Yanagi Shigetomo at the Flash Summit earlier, we learned that most of these flash memory chips are produced in Yokkaichi, Japan (Fab N-Y2, Y3, Y4, Y5, Y6 five dust-free factories) and Kitakami, Iwate Prefecture (K1).
Looking at the plans of flash memory manufacturers around the world, they are all investing heavily in expanding production, and Kioxia is naturally not willing to lag behind.
According to the Nikkan Kogyo Shimbun in May this year, Kioxia is expected to invest up to 2 trillion yen (about 18.37 billion U.S. dollars) to increase the production capacity of 3D NAND. This includes the construction of a new K2 plant in Kitakami, Iwate Prefecture, which is estimated to be twice the size of the K1 plant and is scheduled to start operations in 2023. In addition, Kioxia is also building a new Fab7 plant in Yokkaichi, Japan. The construction of the plant is divided into two phases. The first phase of construction is scheduled to be completed in the spring of 2022 and will be used to produce advanced BiCS FLASH.
As Kioxia said, storage is a cyclical product. But from the current situation, they seem to have a plan in place.
*Disclaimer: This article is originally written by the author. The content of the article is the author's personal opinion. Semiconductor Industry Observer reprints it only to convey a different point of view. It does not mean that Semiconductor Industry Observer agrees or supports this point of view. If you have any objections, please contact Semiconductor Industry Observer.
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