Analysis of the competitive landscape of the packaging substrate industry: the core link of chip packaging opens up room for growth
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summary:
The packaging substrate is the core material of the chip packaging process.
WB products account for
40-50% of the packaging cost, and FC accounts for 70-80% of the packaging cost. Compared with ordinary PCBs,
IC packaging substrates have higher requirements on many technical parameters such as line width/line spacing, board thickness, and preparation process.
According to the substrate, it can be divided into hard packaging substrates, flexible packaging substrates, and ceramic packaging substrates, among which hard packaging substrates are the most widely used. Among the hard packaging substrates, BT packaging substrates used for MEMS, communication and memory chips, LED chips, and ????ABF packaging substrates used for a large number of high-end chips such as CPUs, GPUs, and chipsets occupy the vast majority of the market share.
With the rapid development of artificial intelligence, the demand for downstream AI and HPC-related products has increased, and high-performance high-rise boards (>22L) and large-size substrates (>100mmSQ) are future development trends.
From the perspective of the future development of substrates: BT and ABF are still the core growth drivers, and glass substrates may be the innovation direction of the industry ten years later. In 2021-2022 , the global ABF expansion investment scale reached 15.5 billion US dollars, of which the investment scale in mainland China ranked first, accounting for 46%. We have seen that companies such as Xinsen Technology and Shenzhen Nan Circuit actively invested in packaging substrate projects and seized the opportunity of localization of packaging substrates. At the same time, the AI wave will drive the general trend of advanced packaging, and ABF substrates will benefit greatly. Therefore, it is recommended to pay attention to the leading manufacturers with leading ABF substrate layouts, such as IBIDEN, Shin Kong Electric, Xinxing, and Nanya Circuits.
01
Package substrate - key carrier of integrated circuit packaging
Package substrate - the key carrier of integrated circuit packaging. As the core material of chip packaging, the package substrate protects, fixes and supports the chip, enhances the thermal conductivity and heat dissipation of the chip, and ensures that the chip is not physically damaged. On the other hand, the upper layer of the package substrate is connected to the chip, and the lower layer is connected to the PCB, thereby realizing electrical and physical connection, power distribution, signal distribution, and communication between the internal and external circuits of the chip. There is a high correlation between the IC substrate and the chip, and different chips usually require the design of a dedicated IC substrate to match them.
1. Packaging substrate: core material for chip packaging
IC packaging substrate is the core material of chip packaging. It has the characteristics of high density, high precision, high performance, miniaturization and thinness. It forms a chip together with wafers, leads, etc. after packaging and testing. IC packaging substrate not only provides support, heat dissipation and protection for the chip, but also provides electronic connection between the chip and PCB, plays a role of "bridging the gap" and can even embed passive and active devices to achieve certain system functions.
The introduction of packaging substrates is a landmark event in the move from traditional packaging to advanced packaging . When traditional packaging forms based on wire bonding (WB) cannot meet the needs of multi-pin products, advanced packaging represented by flip-chip (FC) has gradually developed. Packaging substrates have outstanding advantages in achieving multi-pins, reducing package size, and increasing wiring density, and are a very important part of advanced packaging. From the cost perspective, WB-type packaging substrates account for about 40%-50% of the total chip packaging cost (excluding chip cost), while FC-type packaging substrates account for a higher proportion of about 70%-80% of the total chip packaging cost (excluding chip cost).
Package carriers can be classified according to substrate and packaging method.
According to the substrate, it can be divided into hard packaging substrate, flexible packaging substrate and ceramic packaging substrate, among which hard packaging substrate is the most widely used. According to the main raw materials, hard packaging substrate can be divided into BT packaging substrate (MEMS, communication and memory chips, LED chips), ABF packaging substrate (applied to a large number of high-end chips such as CPU, GPU and chipset) and MIS packaging substrate (applied to analog, power IC, and digital currency market fields). Among them, BT packaging substrate and ABF packaging substrate are the most widely used. BT resin substrate material has many advantages such as high heat resistance, moisture resistance, low dielectric constant and low loss factor. It was originally developed by Mitsubishi Gas of Japan and is synthesized by bismaleimide and cyanate resin. BT substrate is not easy to expand and contract with heat and cold, has stable dimensions, hard material and thick lines. About 70% of IC substrates in the world use BT material. ABF substrate material has a large number of pins and a high transmission rate.
ABF resin is a material developed by Intel. Ajinomoto of Japan occupies the vast majority of the market share. It is made of epoxy resin/phenol hardener, cyanate ester/epoxy resin and cyanate ester with thermosetting olefin. The main materials and application fields of flexible packaging substrates: PI, PE (used in automotive electronics, consumer electronics can also be used in military fields such as launch vehicles, cruise missiles and space satellites). The main materials and application fields of ceramic substrates: alumina, aluminum nitride, silicon carbide (used in semiconductor lighting, laser and optical communications, aerospace, automotive electronics, deep-sea drilling and other fields).
According to the different packaging processes of the IC packaging substrate and the wafer connection side, the packaging substrate can be divided into wire bonding (WB) packaging substrate and flip chip (FC) packaging substrate. According to the different packaging processes of the substrate and the PCB connection side, the packaging substrate can be divided into ball grid array package (BGA), pin grid array package (PGA), grid array package (LGA), chip size package (CSP), board on chip package (BOC), etc. At the same time, according to the actual manufacturing difficulty, market size and development trend of semiconductor IC substrates, IC substrates are divided into entry-level, general and high-end categories.
Entry-level category: including BOC, PBGA, CSP, SiP, simple FCCSP (Tenting/MSAP process) , etc. General category: including general FCCSP (SAP process), ETS, EPS, general FCBGA (non-CPU category), etc. High-end category: including complex FCCSP (EAD/PLP, etc.), complex FCBGA (CPU category). According to different application fields, packaging substrates can be divided into memory chip packaging substrates, logic chip packaging substrates, sensor chip packaging substrates, and communication chip packaging substrates. According to data from the China Economic Industry Research Institute, the downstream of IC substrates are mainly used in mobile terminals (26%), personal computers (21%), communication equipment (19%), storage (13%), industrial control and medical (8%), aerospace (7%), and automotive electronics (6%).
The upstream suppliers of IC packaging substrate manufacturers are mainly gold salt, copper clad laminate, PP and other material manufacturers, and the downstream customers are mainly IC packaging and testing companies. In the semiconductor industry chain, IC packaging substrate companies are located in the middle and upper reaches of the industry chain.
Compared with ordinary PCBs, IC packaging substrates have higher requirements on multiple technical parameters such as line width/line spacing, board thickness, and preparation process. The line width/line spacing of PCB boards is usually between 50-100μm, and the board thickness is usually between 0.3-7mm, which cannot meet the technical requirements of chip packaging; the line width/line spacing of HDI boards is usually between 40-60μm, and the board thickness is usually between 0.25-2mm; the line width/line spacing of IC packaging substrates is between 8-40μm, and the board thickness is between 0.1-1.5mm.
Depending on the substrate base material and packaging process, the core performance parameters and downstream application areas of the packaging substrate also vary greatly.
As the wafer process technology path evolves, in order to improve line density, transmission efficiency and anti-signal interference, the packaging method is changing from wire bonding (WB) to flip chip (FC) . In order to achieve the miniaturization and multi-functionality of electronic products, multi-chip packaging will replace single-chip packaging in the future. With the rapid development of artificial intelligence, the demand for downstream AI and HPC-related products has increased, and high-performance high-rise boards (>22L) and large-size substrates (>100mmSQ) are the future development trend.
02
Industry competition pattern: Japan, China and South Korea are the three major players.
ABF substrates benefit from AI trends
2.1. Package substrate: PCB is the fastest growing segment, and advanced packaging drives the growth of package substrates
With the rapid development of servers, 5G, artificial intelligence, big data, the Internet of Things, smart driving and other fields, the demand for chips continues to grow. Integrated circuit packaging substrates, as core materials, have become the fastest growing sub-industry in the PCB industry. According to Prismark statistics, the overall scale of the global IC packaging substrate industry will reach US$17.4 billion in 2022, a year-on-year increase of 20.90%. It is expected to reach US$22.30 billion by 2027, showing a rapid growth trend.
IC packaging substrates are widely used in consumer electronics, industrial control, communications, computers, automotive electronics, military aviation and other fields. The rapid development of downstream application fields has brought huge market space for the IC packaging substrate industry. In the future, with the outbreak of industries such as AI, 5G and autonomous driving, the market demand for high-performance logic chips and large-capacity storage chips is expected to continue to increase, thus bringing new development opportunities to the IC packaging substrate industry.
The growth rate of advanced packaging is higher than that of overall packaging, which will drive the growth of packaging substrates. According to IBS statistics, after reaching the 28nm process node, if the process node continues to shrink, the manufacturing cost of each million gate transistor will increase instead of decrease. While Moore's Law is slowing down, computing demand is skyrocketing. Therefore, advanced packaging has become an important track in the direction of surpassing Moore's Law.
According to the latest data from Yole, the global advanced packaging market will grow from $44.3 billion in 2022 to $78.6 billion in 2028, with a CAGR of 10.6% from 2022 to 2028. According to Yole's forecast, the proportion of advanced packaging in the overall packaging will increase from 38% in 2014 to 50.2% in 2026. The CAGR of the advanced packaging market size from 2019 to 2025 is 6.6%, far higher than the 1.9% of traditional packaging. The growth of the advanced packaging market is more significant and will become the main growth of the global packaging market.
2.2. Japan, Taiwan, and South Korea are the three major powers, while China and the United States are catching up
From the historical development of IC substrates, Japanese manufacturers were the first to take the lead in the world, and then the production capacity was partially transferred to Taiwan and South Korea along with the semiconductor industry chain. From the product structure of leading companies, Taiwan companies have a more comprehensive product series, Japanese companies are mainly concentrated in general and high-end product series, and South Korean companies are mainly concentrated in entry-level and general product series.
The packaging substrate market is a three-way competition. According to statistics from the Taiwan Circuit Board Association, the output value of IC packaging substrate manufacturers in Taiwan, South Korea and Japan accounts for more than 90% of the total output value. Among them, Taiwan's IC packaging substrate manufacturers are the world's largest IC packaging substrate suppliers, accounting for about 38.3% of the total output value, while Japan and South Korea account for 25.6% and 26.7% of the total output value respectively.
The packaging substrate industry has a high degree of concentration, and the strong will always be strong. According to Prismark data, the CR10 of the IC substrate market exceeded 80% from 2016 to 2021, and it will further increase to 85% in 2022. According to statistics from the Taiwan Circuit Board Association, the top ten global packaging substrate suppliers and market shares in 2022 are: Xinxing Electronics (17.7%), Nanya Circuits (10.3%), Ibiden (9.7%), Samsung Electro-Mechanics (9.1%), Shinko Electric (8.5%), Kinsus Technology (7.3%), LG Innotek (6.5%), AT&S (6.1%), Dade Electronics (4.9%) and Xintai Electronics (4.7%).
2.3. BT substrate: South Korea leads, benefiting from the growth of memory chip scale
South Korea leads in BT substrates. According to statistics from the Taiwan Circuit Board Association, the global BT package substrate output value in 2022 is about US$8.18 billion, accounting for about 45.9% of the total package substrate output value. The output value of South Korean BT package substrate manufacturers accounts for about 43.6%, the output value of Taiwan BT package substrate manufacturers accounts for about 30.3%, and the output value of Japanese BT package substrate manufacturers accounts for about 15.0%.
Among them, South Korea's LG Innotek, Samsung Electro-Mechanics, and Sintai Electronics occupy a major share of the global BT packaging substrate. According to statistics from the Taiwan Circuit Board Association, the top five global BT packaging substrate manufacturers are LG Innotek (14.2%), Samsung Electro-Mechanics (11.9%), Sintai Electronics (10.3%), Kinsus Technology (9.5%), and Xinxing Electronics (7.7%).
The expansion of memory chip scale drives the upward demand for BT substrates. Storage accounts for the largest share of downstream applications of BT substrates, while downstream applications of memory chips mainly come from mobile phones, PCs and servers. Emerging industries are developing rapidly, and there is a broad demand for memory chips. Against the backdrop of the rapid development of emerging industries such as 5G, cloud computing and AI, memory chips have a broad market space. According to WSTS data, the global memory chip market size in 2022 will be approximately US$134.41 billion.
The global storage industry market size has increased month-on-month, and the storage market recovery has reached a turning point. The market size of DRAM and NAND has increased month-on-month since 2023Q2, reversing the trend of four consecutive quarters of decline. The global DRAM market size in 2023Q2 increased by 20.4% month-on-month, and the global NAND market size in 2023Q2 increased by 7.4% month-on-month.
The storage industry is now at the bottom of the cycle and is expected to resume growth. Taking the DRAM: DDR3/4GB/256Mx16 price cycle as an example, the storage cycle is roughly 4 years. This cycle started in 20Q1, and the memory price peaked in 21Q3. So far, the price has been reduced for 7 quarters. The bottom of the last storage price cycle was in mid-2019, with a decline of more than 66% during the downward cycle, and then the product price bottomed out and rebounded. The current product price dimension has reached an inflection point. From Q4 of this year to the first half of 24, the price is expected to stop falling and rise.
2.4. ABF substrate: AI is growing rapidly, and global leading companies are accelerating production expansion
According to statistics from the Taiwan Circuit Board Association, the global ABF packaging substrate output value in 2022 is approximately US$9.66 billion, accounting for approximately 54.1% of the total packaging substrate output value. The output value of ABF packaging substrate manufacturers in Taiwan accounts for approximately 45.1%, the output value of ABF packaging substrate manufacturers in Japan accounts for approximately 34.6%, and the output value of ABF packaging substrate manufacturers in South Korea accounts for approximately 12.4%.
According to statistics from the Taiwan Printed Circuit Association, the top five ABF packaging substrate manufacturers are Xinxing Electronics (26.6%), Nanya Circuits (13.5%), Shin Kong Electric (12.8%), Ibiden (14.6%), and AT&S (8%).
From the perspective of the downstream market size of ABF substrates, PC IC chips are still the downstream market with the largest consumption of ABF substrates. The consumption of ABF in servers/switches, AI chips, and 5G base station chips is lower than that in PCs, but the growth is faster, which is the main driving force for the growth of ABF substrates in the future. It is estimated that by 2023, the PC end consumption of ABF substrates will account for 47%, and the consumption of servers/switches, AI chips, and 5G base stations will account for 25%, 10%, and 7%, respectively.
From the upstream perspective of ABF substrates, ABF resin is an important raw material for ABF substrates, which is led by Intel in research and development. Japan's Ajinomoto occupies a large part of the market share, accounting for more than 98% of the market share. According to the data disclosed by Ajinomoto and its production expansion rhythm, the compound growth rate of ABF resin shipments is expected to be about 16.08% from 2021 to 2025.
According to data from Toppu Industry Research Institute, the average monthly demand for ABF substrates will be 234 million in 2021 and will reach 345 million in 2023, with a CAGR of 21.42%. Unisplendour Electronics, the world's largest substrate supplier, said that its ABF substrate production capacity has been booked until 2025.
Due to the gap between supply and demand, in order to improve the supply capacity of ABF substrates, leading packaging substrate suppliers in Japan, South Korea, and Taiwan have invested in expanding ABF substrate production capacity. 2023-2024 will be the peak period for capacity release.
With the trend of high speed and large capacity in the semiconductor industry, the demand for ABF substrates is growing faster. In the M1Ultra chip launched by Apple, the InFO-L packaging technology used adopts a large-area ABF, which requires twice the area of M1Max and has higher precision requirements. In addition to Apple's M1 Ultra chip, Nvidia's server GPU Hopper and AMD's RDNA 3 PC GPU will both switch to 2.5D packaging this year. In April this year, there were also media reports that ASE Advanced Packaging entered the supply chain of first-class server chip manufacturers in the United States.
According to Mega International's forecast, in PC CPU, the PC CPU/GPU ABF consumption area will be approximately 11.0% and 8.9% CAGR respectively from 2022 to 2025, and the CPU/GPU 2.5D/3D package ABF consumption area will be as high as 36.3% and 99.7% CAGR respectively.
In servers, Mega International predicts that the CPU/GPU ABF consumption area will be approximately 10.8% and 16.6% CAGR from 2022 to 2025, and the CPU/GPU 2.5D/3D packaging ABF consumption area will be approximately 48.5% and 58.6% CAGR.
The move of high-computing chips towards advanced packaging will become the main reason for the growth of demand for ABF substrates. In addition, another driving factor for ABF is the rise of new technologies and applications such as AI, 5G, autonomous driving, and the Internet of Things. Taking the previously most popular metaverse as an example, AR/VR and other head-mounted display devices are important entrances to the future metaverse, and there are huge chip opportunities hidden behind them. These chip opportunities will also become a new growth force to promote the growth of the ABF substrate market. Gartner predicts that the AI chip market size will reach US$53.4 billion in 2023, an increase of 20.9% over 2022, and will increase by 25.6% in 2024 to US$67.1 billion. By 2027, AI chip revenue is expected to be more than twice the market size in 2023, reaching US$119.4 billion.
The rise of chiplet packaging technology further promotes the demand for ABF substrates. Chiplet means core particle, which is to split the system-level chip SoC into small chips of different sizes and performances according to different functions. Different modules, such as CPU, memory, analog interface, etc., can be produced separately using different processes. Therefore, the chiplet model has the characteristics of short development cycle, strong design flexibility and low design cost. Large-area rectangular SoC chips are packaged on 12-inch wafers, resulting in a large amount of waste of wafer edge area, reduced packaging efficiency, and increased packaging cost of a single chip, which cannot meet the higher requirements of chiplet development. Chiplet can be realized through multiple packaging technologies such as MCM, InFO, CoWoS, EMIB, etc. The core technology is mainly dominated by global semiconductor leading manufacturers such as TSMC, ASE, Intel, etc., spanning multiple levels of packaging technology from 2D to 3D. Different solutions have different packaging difficulties, costs and performance, which can meet the needs of downstream customers with different preferences.
The chiplet market size is expected to reach US$57 billion in 2035. According to Omdia data, the chiplet market size was only US$645 million in 2018, and is expected to reach US$5.8 billion in 2024, with a compound growth rate of about 44% from 2018 to 2024; at the same time, Omdia predicts that the chiplet market size is expected to reach US$57 billion in 2035, with a compound growth rate of about 23% from 2024 to 2035.
Advanced packaging was born to continue Moore's Law because it can help integrate chips without changing the area and achieve higher efficiency. Through chiplet packaging technology, individual chip designs from different processes and different materials are placed on the interposer substrate. To integrate these chips together, a larger ABF substrate is needed. In other words, the area consumed by the ABF substrate will increase with the chiplet technology, and the larger the area of the substrate, the lower the yield of the ABF, and the demand for ABF substrates will further increase.
2.5. Glass substrate: future innovation and development direction
Intel has been exploring replacing organic substrates with glass, and after more than a decade of efforts, they have made significant progress. Glass substrates are organic materials similar to printed circuit boards in organic packages replaced with glass. Although this does not mean replacing the entire substrate with glass, the core material of the substrate will be made of glass. At the same time, the metal redistribution layer (RDL) still exists on both sides of the chip, providing actual channels between various pads and solder joints.
Intel calls it a "milestone achievement" that will redefine the boundaries of chip packaging, providing game-changing solutions for data centers, artificial intelligence and graphics construction, and promoting the progress of Moore's Law. Intel plans to start shipping later this decade. The first products to receive the glass substrate treatment will be its largest and most profitable products, such as high-end HPC (high-performance computing) and AI chips.
Intel currently has a fully integrated glass R&D line in Arizona, USA, which costs more than $1 billion and requires cooperation with equipment and material partners to build a complete ecosystem to make it work properly. Only a few companies in the industry can afford such investments, and Intel seems to be the only company that has developed glass substrates so far.
Intel expects that glass substrates have excellent mechanical, physical and optical properties, enabling the company to build higher-performance multi-chip SiPs with 50% more dies placed on the chip. In particular, Intel expects glass substrates to enable ultra-large 24×24cm SiPs that accommodate multiple pieces of silicon. At the same time, higher interconnect density (i.e., tighter spacing) can be achieved, making it possible to increase interconnect density tenfold, which is critical for power and signal transmission in next-generation SiPs. Glass substrates can also reduce pattern deformation by 50%, thereby increasing the depth of focus of lithography and ensuring more precise and accurate semiconductor manufacturing.
03
Industry summary: Triple barriers consolidate the leading position and resonate with the semiconductor cycle
3.1. Triple barriers consolidate the leading position in the industry
Since IC substrates are directly connected to bare chips, their manufacturing faces three barriers: capital (large), technology (difficult), and customers (slow).
1) Capital barriers: The production process of IC packaging substrates is complex, and requires high investment scale for production sites and equipment, large capital demand and long investment return cycle. When downstream customers certify IC packaging substrate manufacturers, process capability, production capacity and quality stability are important indicators for assessing suppliers. Production equipment is a key factor in determining process capability, production capacity and quality stability. Therefore, high investment in equipment constitutes an obstacle for new entrants. In addition, IC packaging substrate manufacturers must continue to invest in production equipment, process research and development, etc. to maintain and enhance the competitiveness of their products and adapt to the development trend of the industry. Therefore, the IC packaging substrate industry has a large investment scale and a long production cycle, which constitutes a high investment barrier for companies that intend to enter the industry.
2) Technical barriers: technology accumulation and R&D innovation barriers. IC packaging substrates require different production equipment and process routes based on differences in core parameters such as substrate material, number of layers, line width/line spacing, finger center spacing, etc. The degree of customization is very high. The entire production process involves many cross-disciplinary disciplines such as materials science, optics, chemistry, electromagnetism, automatic control, and testing, as well as dozens or even hundreds of working procedures.
During the production process, any technical blind spot or process defect may lead to product defects. In addition, in order to match the rapid iteration of downstream chips, IC packaging substrate manufacturers need to continuously develop and innovate in new products and new processes, and in process technology, product performance, automation level, etc. Therefore, IC packaging substrate manufacturers need to go through long-term technical accumulation and experience summary to fully master the entire production process and form their own core technology. Continuous research and development innovation is required, which constitutes a high barrier for companies that intend to enter the industry.
3) Customer barriers: As the core material of chips, the production capacity, quality, and delivery time of IC packaging substrates directly affect the performance, yield, and efficiency of downstream customers in manufacturing chips. Therefore, in order to ensure the quality of their own products, production efficiency, and the security of the supply chain, downstream customers usually adopt a "qualified supplier certification system" for IC packaging substrate suppliers. IC packaging substrate companies that intend to become qualified suppliers for downstream customers need to have rich industry experience, excellent product quality, stable production capacity, continuous technology iteration, efficient delivery capabilities, and a good brand reputation, and need to pass a series of certification procedures such as strict factory inspections, proofing, and small batch orders, which can take up to half a year to two years. The conversion cost of downstream customers to change suppliers is high and the cycle is long. Therefore, unless there are special circumstances, they often maintain long-term cooperation with IC packaging substrate suppliers. Therefore, the strict certification standards, procedures, and cycles of downstream customers for IC packaging substrate companies constitute a high customer barrier for companies that intend to enter the industry.
3.2. The packaging substrate industry resonates with the semiconductor cycle and is expected to bottom out and rebound in 2024
The downstream direct application field of the IC packaging substrate industry is chip manufacturing, and the terminals are widely used in consumer electronics, industrial control, communications, computers, automotive electronics, military aviation and other industries. Therefore, the cyclicality of the IC packaging substrate industry is less affected by a single downstream industry. The cyclicality of the IC packaging substrate industry is mainly reflected in changes with the fluctuations of the macro economy and the overall development of the semiconductor industry.
Reviewing several rounds of semiconductor cycles since 2008, the high points of the year-on-year growth rate of global semiconductor monthly sales corresponded to the beginning of 2010, the beginning of 2014, the middle of 2017, and the end of 2021; the low points of the year-on-year growth rate of global semiconductor monthly sales corresponded to the end of 2008, the beginning of 2012, the beginning of 2016, and the middle of 2019. The upward cycle is usually 1-2 years, and the downward cycle is usually 1-1.5 years.
Observing the month-on-month changes in global semiconductor sales in this round, the upward range is from Q2 2019 to Q1 2022, and the downward range is from Q1 2022 to the present, so it is speculated that the cycle is expected to bottom out in Q3 2023. The peak of the last round of expansion of ABF substrate factories was in 2020-2021, and the construction cycle is usually 2-3 years. Therefore, the time point for capacity release is 2023-2024, so there is sufficient capacity support when the economy recovers.
04
Focus on the world's leading manufacturer of ABF substrate layout
The characteristics of the packaging substrate market, such as large capital, difficult technology and slow customers, have created a position where the strong will always be strong. At the same time, the AI wave will drive the general trend of advanced packaging, and ABF substrates will benefit greatly. Therefore, it is recommended to pay attention to the leading manufacturers with leading ABF substrate layout, such as IBIDEN, Shin Kong Electric, Xinxing, Nanya Circuits, Xinsen Technology, and Shenzhen South Circuit .
4.1. Ibiden
Ibiden was founded in 1912 and is currently the world's third largest IC packaging substrate manufacturer. It is mainly engaged in the research and development, production and sales of IC packaging substrates and multi-layer circuit boards. Ibiden can realize conductor patterning technology for ultra-fine wiring, focusing on SAP (semi-additive process), providing world-class micro-patterns, and is also promoting the development of future semiconductor semiconductor graphics technology. In addition, Ibiden's substrate also has micro-vias with high connection reliability. Micro-Via, which connects between layers, is one of the most important components of IC packaging substrates. With unique alignment technology and the most advanced laser and metal planting technology, Ibiden has achieved Micro-Via that not only has connection reliability but also electrical characteristics.
Ibiden has an absolute advantage in the packaging substrates (FCBGA) for high-end PCs and server CPUs. Ibiden is the largest supplier of packaging substrates for Intel, which are the most difficult to manufacture. In May 2021, Ibiden announced that it would invest 180 billion yen (about 11.7 billion yuan) to build a new factory. By dismantling and transforming the existing Kawama factory (Ogaki City, Gifu Prefecture, Japan), the operation of the new plant (Cell 6) will be started in mid-2023. In June 2023, Ibiden sold its Beijing factory to Xinsen Technology Co., Ltd. to focus on the development of its core business.
Ibiden is also accelerating the centralized production of semiconductor packaging substrates. As AI places higher demands on chip data processing capabilities, IC packaging substrates are moving towards larger, finer, and high-end 2.5/3D paths. Ibiden has developed a technical roadmap for this purpose, and it is expected that the size of the packaging substrate will be greater than 100mm by 25 years. In order to comply with the general trend of the industry, Ibiden's future research and development direction will focus on 3D stacked packaging and glass substrate materials.
4.2. Companies such as Xinsen Technology and Shenzhen South Circuit actively invest in packaging substrate projects and seize the opportunity of localization of packaging substrates
The industry has broad growth potential, and packaging substrate companies are actively expanding production. With high certainty in the industry's growth trend, IC substrate manufacturers including AT&S and Ibiden have expanded production since 2018. From 2021 to 2022, the global ABF expansion investment scale will reach US$15.5 billion, of which mainland China ranks first in investment scale, accounting for 46%. We have seen companies such as Xinsen Technology and Shenzhen Nan Circuit actively invest in packaging substrate projects, seizing the opportunity of localization of packaging substrates.
Xinsen CSP packaging substrate has a "ten-year core road" and has the ability to produce thin boards, fine lines, and multi-layer boards. Xinsen Technology's CSP packaging substrate factory equipment is designed to have the ability to process the thinnest 0.035mm core board. For coreless substrate products, an automatic separator is used in the manufacturing process, which has a fast separation speed and high precision, avoiding the problems of substrate warping, creases and breakage after manual separation. In terms of fine lines, the company has a full set of equipment corresponding to Tenting (50/50-25/25μm), MSAP (30/30-15/20μm), and ETS (13/13-10/10μm). The LDI exposure machine uses direct exposure for image transfer. The company has introduced the industry's advanced high-resolution fully automatic LDI exposure machine with high alignment accuracy, good stability, and high production speed. In addition, the vertical non-contact developing line is used to improve the yield of fine lines. In terms of multi-layer board production, the company has a mature interlayer alignment system, which uses highly integrated integrated fully automatic lamination. At the same time, the factory improves efficiency and ensures consistency through high automation.
CSP packaging substrates have high-quality customer resources and continue to expand production in line with downstream demand. In the field of BT packaging substrates, Xinsen Technology is one of the few companies in China that has mass production capabilities and stable customer resources. The company began to enter the field of IC packaging substrates in 2012, achieved full production of BT substrates in 2018, and achieved financial profitability in 2019. It has passed Samsung certification, and its customers include Samsung, Changdian, Huatian, Rockchip Microelectronics, Tsinghua Unigroup, Western Digital, OSE, Amkor and other well-known domestic and foreign packaging and testing, IC design manufacturers. The company's current Guangzhou production base has a production capacity of 20,000 square meters/month with excellent yield. The IC packaging substrate project in cooperation with the Big Fund (Guangzhou Xingke, implemented by its wholly-owned subsidiary Zhuhai Xingke) is divided into two phases of investment. The planned production capacity of the first phase is 45,000 square meters/month, and the capacity of the first production line (15,000 square meters/month) has been opened. In the future, with customer demand and market conditions, the company will continue to expand production to support long-term growth.
FCBGA packaging substrate customer certification, yield improvement and production line construction are progressing steadily. In the field of ABF packaging substrates, Xinsen Technology is one of the only few domestic suppliers that has made breakthroughs in customer certification. At present, it has established connections with some mainstream chip design companies and packaging companies at home and abroad. 1) Production capacity: The production capacity of the first phase of the Zhuhai factory and the Guangzhou factory has been completed, and has passed the factory audit of some domestic benchmark customers. Product certification and overseas customer expansion are progressing as planned, and it is expected to gradually enter the mass production stage in 2024Q2. As of the end of 2023, the cumulative investment scale exceeded 2.6 billion yuan, and the counter-trend expansion supported the company's long-term growth. 2) Yield: In 2023, the yield of FCBGA packaging substrates increased rapidly, the yield of low-layer boards increased to 90%, and the yield of high-layer boards increased to more than 85%. The yield gap with overseas leading companies has further narrowed. It is expected that the product yield will reach the same level as overseas leading companies before the end of 2024. 3) Product capabilities: It has the mass production capacity of products with 20 layers and below, and products with more than 20 layers are in the testing stage. 4) New technology development: Glass substrates, magnetic substrates, and embedded multi-layer substrates are all progressing in an orderly manner, with breakthroughs in core materials and production processes. (Source: Founder Securities Research Institute)
Due to limited space, to be continued ...
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Co-organizer: Yimao Automotive Technology (Shanghai) Co., Ltd.
Conference Background / September 27 Hangzhou Convention and Exhibition Center
In the context of the accelerated global digitalization process, with the rapid development of artificial intelligence, cloud computing, big data and other fields, the demand for data processing and transmission is getting higher and higher. Optoelectronic co-packaging technology has attracted much attention as a cutting-edge technology to meet this demand. With Baidu, Alibaba, Tencent, NetEase, H3C, Xunmeng Information, Telecom, China Unicom and many other companies displaying AI big models and data center solutions at the Digital Trade Fair. In response to this demand, the organizers of the Global Digital Trade Expo and Yimao Auto jointly held the concurrent event of the third Digital Trade Expo at the Hangzhou Convention and Exhibition Center on September 27 : 2024 Optoelectronic Co-Packaging CPO and Heterogeneous Integration Forward-looking Technology Exhibition and Exchange Conference.
The conference will invite semiconductor material suppliers, optical chip manufacturers, optical device manufacturers, optical module manufacturers, OSAT, system integrators, cooling solution providers, equipment manufacturers, testing & verification manufacturers, research institutes, data center operators, etc. Upstream and downstream industry companies will jointly discuss the latest progress, application examples and future development direction of silicon-based optoelectronic heterogeneous integration technology and CPO.
Agenda
Sneak peek at the conference schedule!
2024 Optoelectronics Co-Packaging CPO and Heterogeneous Integration Forward-looking Technology Exhibition and Exchange Conference Agenda (Continuously updated..)
September 27th, all day
1. Optoelectronic co-sealing and heterogeneous integration market and technology evolution in the big data era
✓Analysis of Optoelectronic Package CPO and Silicon Photonics Technology
✓Application direction and market forecast of optoelectronic package CPO and silicon photonics
✓Summary of technology evolution
Speaker: Lightcounting, Analyst, Cao Li
2. Chip optoelectronic interconnection technology in the post-Moore era and China's CPO industry standards
Speaker: Secretary General of China Computer Interconnect Technology Alliance (CCITA), President of Wuxi Xingguang Interconnect Technology Research Institute, Researcher of Institute of Computing Technology, Chinese Academy of Sciences, Hao Qinfen
3. Opportunities and challenges of co-packaging optics in the era of big data
Speaker: Zhu Chen, Senior Optical Network Architect, Baidu
4. Applications and challenges of CPO and OIO
Speaker: Tang Ningfeng, Chief Engineer of CPO Technology Pre-research, ZTE Corporation
5. Optoelectronic integrated chips and systems for new interconnection applications
✓Specialized circuits and optoelectronic integrated chips for high bandwidth and high density integration requirements of new devices
✓Photoelectric fusion, collaborative design method case sharing & Demo demonstration
✓Integration of silicon-based optoelectronics and microelectronics technology
Speaker: Shi Jingbo, Distinguished Researcher, School of Integrated Circuits, Beijing University of Posts and Telecommunications
Roundtable Interview: Discussion on Optoelectronic I/O Technology
Interview guests:
✓China Computer Interconnect Technology Alliance (CCITA), Secretary General, Hao Qinfen
✓ Tan Min, Professor and Doctoral Supervisor at the School of Integrated Circuits, Huazhong University of Science and Technology and Wuhan National Research Center for Optoelectronics
✓ Baidu, Senior Optical Network Architect, Zhu Chen
✓Wang Lei, technical expert from a laser radar company
6. EMIB-based optoelectronic package CPO technology
✓Advantages of CPO technology based on EMIB platform
✓Case Demonstration
Speaker: Marcus Yang, Director of Integrated Optics Products, Intel
7. 3D chip integration solution based on silicon photonic chips
Speaker: Wang Dong, Device Manager, National Information Optoelectronics Innovation Center
8. Electronic-photonic joint simulation technology promotes large-scale application of CPO technology
✓CPO technology requirements for simulation
✓Drawbacks of PDA tools & EDA tools
✓Cross-dimensional coupled simulation & cross-size joint simulation
9. Thin-film lithium niobate photoelectric chips and silicon-based heterogeneous integration
Speaker: Liu Liu, researcher and associate professor at the School of Optoelectronic Science and Engineering, Zhejiang University
10. Optical I/O Keynote
Speaker: Tan Min, dual-appointed professor and doctoral supervisor at the School of Integrated Circuits, Huazhong University of Science and Technology and Wuhan National Research Center for Optoelectronics
11. Silicon-based optoelectronic wafer end coupler and TSV integrated three-dimensional integration technology
Inviting unit: Huajin Semiconductor
12. 3D photonic integrated packaging technology facilitates large-scale integration of high-performance automotive silicon photonic chips
✓Multi -layer homogeneous in-situ growth and heterogeneous wafer bonding process
✓Effective integration of active and passive
✓Application in the exploration of microwave photonics
13. Silicon Photonics CPO Switches for Data Centers
Speaker: Ruan Zuliang, Optical Internet System Architect, H3C
14. Heterogeneous Silicon Photonics: From Material Platform to Application
Speaker: Chang Lin, Peking University Boya Young Scholar, researcher, assistant professor, and doctoral supervisor at the School of Electronics
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