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Are you still worried about glitches when powering on at low voltage? This IC can do it

Latest update time:2023-01-09 17:23
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Experienced engineers know that one of the most dangerous times for a system is when power is applied. Depending on the time constant and how smoothly and quickly the power rails reach nominal values, different ICs and system parts may turn on, lock up, or turn on in incorrect modes as the devices try to work with each other. A bigger challenge is that timing- and slew-rate-related IC performance at power-up can be a function of temperature, associated capacitors, mechanical stress, aging, and other factors.

Potential problems are exacerbated when the operating voltage rail drops to low single-digit values, thereby reducing the headroom when operating below the nominal supply rail. All of these factors have the potential to cause inconsistent startup performance and a frustrating debugging process.

Therefore, analog IC vendors have designed specialized supervisory ICs to eliminate uncertainty and inconsistency at power-up. This article will define and describe the glitch problem, and then explain how to avoid the glitch by adding some small specialized ICs from An alog Devices .

What is a glitch?

Like many engineering terms such as "buffer" or "programmable," the exact meaning of "glitch" is context-dependent. The glitch may be:
  • Spikes caused by noise on signal or power lines

  • Sudden power rail drops caused by load transients

  • The microsecond period when the upper and lower MOSFETs in the bridge accidentally turn on at the same time due to different gate driver on/off times (this is a very bad situation)

  • Momentary uncertain signals and race conditions due to timing tolerances and differences between components


This article will explore glitches that can occur during "power-up" when power is applied and the integrated circuit transitions to normal operating conditions, particularly in low-voltage systems. Power-on glitches like these are particularly troublesome because they can cause intermittent problems that are difficult to debug and have no obvious correlation or consistency. Because glitch-inducing conditions tend to be "at the edge," their occurrence can vary with temperature, power line tolerances (while still within specifications), variations in individual components within the same equipment batch, and other factors that are difficult to determine.
What are burrs and where do they come from? Let's consider a system with a microcontroller and associated monitoring/protection reset IC, whose role is simple and focused: keep the system operating reliably during power-up, power-down, and power-down conditions (Figure 1).
Figure 1: To understand the source of the glitch, you first need to understand the layout of a simple typical microcontroller and its associated monitoring/protection reset IC, both of which are powered by a battery and their respective voltage regulators. (Image source: Analog Devices)
In a typical battery-powered application, a DC-DC converter generates the power rail from a small, low-voltage battery. A supervisory IC is typically placed between the DC-DC converter and the microcontroller to monitor the supply voltage and enable or disable the microcontroller.
Supervisory ICs ensure reliable operation by accurately monitoring system power and then asserting or deasserting the microcontroller's enable inputs. The enabling and disabling of the microcontroller is managed by monitoring the reset output pin of the IC. This pin is usually an open-drain pin connected to a 10 kΩ pull-up resistor. This supervisory IC monitors the supply voltage and issues a reset signal when the input voltage falls below the reset threshold.
After the monitored voltage rises to its nominal voltage threshold, the reset output remains active for the reset timeout period and then deasserts. This way, the target microcontroller can come out of reset and start working.
But what happens to the reset line before the supervisory IC turns on and pulls the reset line low? The answer can be found if we look closely at the typical power-up sequence (Figure 2). When the supply rail VCC starts to power up, both the microcontroller and the supervisory IC are disconnected. Therefore, the reset line is floating and the 10 kΩ pull-up resistor causes its voltage to track VCC.

Figure 2: During a typical power-up sequence, the reset line floats so its voltage tracks the rising supply rail VCC. (Image source: Analog Devices)
This voltage rise may be between 0.5 V and 0.9 V and may cause system instability. Whenever the supervisory IC starts up, the reset line is pulled down, thus preventing the microcontroller from accidentally starting up. This glitch is a common problem for all previous generations of monitoring ICs.

Low voltage systems amplify the problem

As more and more low-power devices operate at lower and lower voltages, this glitch becomes a major problem. Let's consider a system with three logic levels: 3.3 V, 2.5 V, and 1.8 V (Figure 3). For a 3.3 V system, the output low voltage threshold (Vol) and input low voltage threshold (Vil) are between 0.4 V and 0.8 V. If a glitch occurs at 0.9 V, there is a risk that the processor may become unstable due to power-on and power-off operations.

Figure 3: The logic level decreases from 3.3 V to 1.8 V, as does the associated voltage threshold. (Image source: Analog Devices)

The situation is more sensitive for nominal 1.8 V systems. Now, Vol and Vil are much lower, 0.45 V and 0.63 V respectively. In this system, the 0.9 V glitch represents a larger percentage, giving it a greater potential for error.

A glitch affects system operation, how will this situation develop? Let's consider that the supply voltage VDD slowly rises to 0.9 V and remains at that value for a short period of time (Figure 4). Although this voltage is not sufficient to turn on the monitoring IC, it may still turn on the microcontroller and cause it to operate in an unstable state. Because it is in an indeterminate state at 0.9 V, the microcontroller RESET input interprets the glitch as a logic 1 or 0, incorrectly enabling or disabling it.

Figure 4: When supply voltage VDD rises to 0.9 V and remains there, the microcontroller may turn on and off erratically. (Image source: Analog Devices)

This will cause the microcontroller to only execute part of the instruction or not write the memory completely. These are just two things that can happen, but can lead to system failure and catastrophic consequences.

Solve glitch problem

Overcoming this problem does not require reverting to a higher voltage rail, nor does it require complex system-level architecture to eliminate the glitch or minimize its impact. Instead, we need a new generation of monitoring ICs that can identify unique aspects of a problem and prevent glitches, regardless of voltage levels during power-on or power-down conditions.

Achieving this requires the use of proprietary circuits and ICs, such as the MAX16162 , a nanopower power supply monitor with glitch-free power-up. With this small IC in a four-bump WLP and four-lead SOT23 package, the reset output remains low as long as VDD is below the threshold voltage, preventing voltage glitches on the reset line. Once the voltage threshold is reached and the delay time expires, the reset output deasserts and enables the microcontroller (Figure 5).

Figure 5: As long as VDD is below the threshold voltage, the MAX16162 holds the reset output low to prevent voltage glitches on the reset line. (Image source: Analog Devices)
Unlike traditional supervisory ICs that cannot control the reset output state when VCC is very low, the MAX16162's reset output is guaranteed to remain asserted until a valid VCC level is reached .
The MAX16161 is a close relative of the MAX16162 and has almost identical specifications, but there is one functional difference and some pinout redefinition (Figure 6). The device is equipped with a manual reset (MR) input that asserts a reset signal when an appropriate input signal is received. Depending on the choice, this signal can be an active-low or active-high signal. In contrast, the MAX16162 has no MR input and instead has independent pins for VCC and VIN , allowing threshold voltages as low as 0.6 V.
Figure 6: MAX16161 and MAX16162 are similar, but there is a small difference in functions and pins: MAX16161 is equipped with an MR input and will issue a reset signal when receiving an appropriate input signal, while MAX16162 has separate VCC and VIN pins . (Image source: Analog Devices)


Sequencer vs. Monitor

Another pair of terms that has some overlap and ambiguity is sequencer and monitor. The supervisor is used to monitor a single supply voltage and assert/release reset under specified conditions. In contrast, a sequencer is used to coordinate relative reset and "power good" assertions between two or more power rails.

The MAX16161 and MAX16162 can be used as simple power supply sequencers (Figure 7). The MAX16161/MAX16162 insert a delay after the first regulator's output voltage becomes valid and generate an enable signal for the second regulator after a reset timeout. Because the MAX16161/MAX16162 never cancel reset until the supply voltage reaches the correct value, the controlled power supply can never be incorrectly enabled.

Figure 7: A circuit using the MAX16161 can be configured so that the device not only ensures glitch-free power-up but also manages power-rail sequencing between the two rails. (Image source: Analog Devices)

There are also many designs with multiple power rails and more complex sequencing requirements. At this point, Analog Devices' LTC2928 multi-channel power supply sequencer and monitor is a solution (Figure 8).

Figure 8: The LTC2928 power sequencer manages power-up and power-down sequencing between four independent power rails and enables the user to control critical parameters. (Image source: Analog Devices)

Using this four-channel cascaded power sequencer and high-precision monitor, designers can configure power management sequencing thresholds, sequencing and timing with just a few external components. The device ensures that the power rails are enabled in the required sequence. In addition to power-on sequencing, the device can also manage complementary and often equally critical power-down sequencing.

Sequencing outputs are used to control power enable pins or N-channel transmission gates. Other monitoring functions include undervoltage and overvoltage monitoring and reporting, and generation of microprocessor resets. Reports the type and source of the fault for diagnostic purposes. Provides individual channel control functionality to enable output and monitoring functions to be performed independently. For systems with more than four power rails, multiple LTC2928s can be easily connected to sequence an unlimited number of power supplies.

Conclusion

There are glitches in every application, but so far they have not caused serious problems in the dominant high-voltage applications. Now that the supply voltage is going lower, system turn-on reliability will be reduced due to the 0.9 V voltage glitch.

As shown, designers can take advantage of newer supervisory ICs to improve reliability. This IC enables glitch-free operation and provides maximum system protection for low-power/low-voltage applications.

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Editor’s words:

As mentioned in the article, compared with other problems in system design, the glitch problem does not seem that complicated, but the causes and results behind it are not that simple. Complex debugging or complicated system architecture are not the first choice for efficient design. Making good use of monitoring IC is the best solution.


How do you deal with glitches? What are your thoughts on applying monitoring ICs to solve these problems? Welcome to leave a message to share and discuss with everyone!



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