Seizing the lead in IEEE 802.3bt PoE++, ADI launches PoE++ PD and PSE controllers
After five years of development, the IEEE's new Power over Ethernet (PoE) standard, also known as PoE++, was finalized in late 2018. The introduction of the new standard has developers of power sourcing equipment (PSE) and powered devices (PD) scrambling to create new hardware, as PoE++ can deliver up to 71.3W of power to a PD, nearly three times the previous standard's 25.5W. PoE++ allows 52V/1.7A to be transmitted over the same cabling via Gigabit Ethernet, paving the way for a new generation of power-hungry applications, including popular outdoor pan-tilt-zoom camera networks or remote base stations and access points for cellular or Wi-Fi communications.
Figure 1 shows a basic PoE block diagram with a PD connected to a PSE. Now that the 802.3bt standard has been finalized, PoE developers want to be first to market with their PoE++ designs. The challenge now is finding officially released and certified PSE and PD solutions that are 100% compliant with the 802.3bt standard. Look no further…
Figure 1. Power over Ethernet block diagram.
As a pioneer in PoE technology and a member of the IEEE 802.3bt working group, ADI has launched PoE++PD and PSE controllers to help PoE developers complete their designs in accordance with the final version of the 802.3bt standard. The LTC4291-1/LTC4292 PoE++PSE controller chipset and PoE++PD controller launched by ADI help developers design complete end-to-end PoE++ systems, which have been field tested and verified. We will introduce the unique features of the LTC4291-1/LTC4292 chipset in detail, describe how it supports the latest IEEE PoE standard, and quickly review the key features of the PoE++PD product.
LTC4291-1/LTC4292PSE Chipset The LTC4291-1/LTC4292 is an isolated 4-port PSE controller chipset designed for PoE++ systems.
Figure 2 is a simplified schematic of the LTC4291-1/LTC4292 showing how one of the four Ethernet ports is powered. The chipset features an integrated isolation architecture where the LTC4291-1 provides an isolated digital interface to the PSE host and the LTC4292 provides a high voltage Ethernet interface.
Figure 2. Simplified schematic of the LTC4291-1 and LTC4292 PoE++ 4-port PSE chipset .
The IEEE 802.3 Ethernet specification requires that the network segment (including the PoE circuit) be electrically isolated from the chassis ground and PHY. By placing the LTC4291-1 on the non-isolated side and the LTC4292 on the isolated side, up to 6 expensive optocouplers and 1 isolated power supply can be replaced with a cheaper and more reliable 10/100 Ethernet transformer. This topology not only saves costs, but also enables a more stable, reliable and easy-to-manufacture PSE design.
802.3bt introduces two different PD signature configurations: single-signature and dual-signature PD. Single-signature PD (Figure 3) is a PoE++ PD that shares the same detection signature and classification signature between two pairs. Dual-signature PD is a PoE++ PD with independent signatures on each pair; allowing each pair to have completely independent classification and power allocation. Dual-signature PD solutions are very complex and cost twice as much as single-signature PD.
Figure 3. Topological structures of single-signature and dual-signature PDs.
Additionally, it is important to note that despite sharing a common architecture, 802.3bt dual-signature PDs are not equivalent to previous standard UPoE devices. The LTC4291-1/LTC4292 supports an updated PoE++ PD detection process that includes a new connection check sub-process to determine which PD signature configuration the PSE is connected to.
After performing the connection check, the LTC4291-1/LTC4292 will begin to verify that the connected PD complies with the IEEE standard. Although the IEEE requires the PSE to use either a 2-point voltage or 2-point current detection scheme to detect valid PD characteristics (25 kΩ), the LTC4291-1/LTC4292 uses both types of detection schemes to achieve a more robust and reliable scheme. This multi-point (multi-voltage and multi-current) detection mechanism can be used to eliminate false alarms and avoid damage to network equipment that is not designed for PoE DC voltage tolerance.
PoE++ delivers power over 4 pairs of conductors (8 conductors) compared to the traditional 2 pairs (4 wires) used by previous PoE standards. Not only does this enable new higher power levels, but using more conductors can improve the efficiency of older systems with lower power levels because the power loss in the cable is cut in half. For example, to ensure that a PoE+ PD can receive 25.5 W, 30 W of power needs to be supplied to the PoE+ PSE, as the loss over 100m of CAT5E cable is 4.5 W. Powering the same 25.5 W PD using the PoE++ standard typically reduces the loss to less than 2.25 W, increasing the overall power delivery efficiency from 85% to 92.5%. Considering the number of PoE PDs worldwide, this means a significant reduction in power consumption and, in many cases, a 7.5% reduction in carbon emissions.
PoE++ introduces four new high-power PD classes, bringing the total number of single-signature classes to nine (see Table 1). Classes 5 through 8 are new to PoE++ and correspond to PD power levels from 40W to 71.3W. PSEs still have the choice of using the physical layer (i.e., 5-event classification for 71.3W) or the data link layer (e.g., Link Layer Discovery Protocol (LLDP)) to classify PDs, and PDs must still be able to support both classification schemes to comply with the standard. Keep in mind that because each pair operates independently in a dual-signature PD, each pair can be a different class. For example, Class 1 (3.84W) on the first pair and Class 2 (6.49W) on the second pair would result in a dual-signature Class 1, Class 2 (10.3 W) PD.
Table 1. PoE++ PD Classification and Power Levels
PoE++PD can also implement an optional extension of physical layer classification (called Autoclass), in which a PoE++PSE (such as the LTC4291-1/LTC4292) measures the actual maximum power drawn by the connected PD. In this way, using this power management feature, the LTC4291-1/LTC4292 can allocate the remaining power to other bulbs (if a certain bulb is measured and consumes less than its classified power due to a lower brightness setting or a short cable).
It goes without saying that PoE++ is backward compatible with the older 25.5W PoE+ and 13W PoE standards. A lower power PoE+ or PoE PD can be connected to a higher power PoE++ PSE (such as the LTC4291-1/LTC4292) without any problems. Furthermore, when the situation is reversed, that is, a higher power PoE++ PD is connected to a lower power PoE+ or PoE PSE, the PD can operate in a negotiated lower power state, which is called demotion. If the PD ignores the demotion and operates in its highest power state, the high power PD will cause the PSE to repeatedly turn on, reach its current limit, and then turn off, which actually causes the PSE to generate low frequency parasitic oscillations. Therefore, both PoE+ and PoE++ require demotion, but unfortunately demotion is ignored in many implementations.
Developers can maximize PoE++PD performance using Analog Devices ICs. Figure 4 shows a simplified block diagram of a high-efficiency single-signature PoE++PD interface with an auxiliary input. This solution has greater than 94% end-to-end (RJ-45 input to PD load) efficiency and operates over a -40°C to 125°C temperature range.
Figure 4. Simplified block diagram of an efficient IEEE 802.3bt single-signature PD interface with auxiliary input.
The LT4321 on the RJ-45 interface in Figure 4 is an active diode bridge controller that can be used to replace the required diode bridge rectifier. The LT4321 uses a low loss N-channel MOSFET bridge to simultaneously increase the available power to the PD and reduce heat dissipation. PoE++ requires the PD to accept a DC supply voltage of either polarity on its Ethernet input, so the LT4321 smoothly rectifies the power from both data pairs and combines it into a single power output with the correct polarity. Because the improved power efficiency virtually eliminates the heat sink requirement, overall circuit size and cost are reduced, and power can be reduced by a factor of 10 or more, allowing the PD to stay within the class power budget or enable the PD to add functionality.
Behind the ideal diode bridge controller in Figure 4 is the “brain” of the PD interface, the LT4295 , a PoE++ PD interface controller that integrates a highly efficient forward or no-opto flyback controller. The LT4295 supports all nine PD classes with an integrated 25kΩ signature resistor, up to 5 event classifications, and a single signature topology. In addition to providing more PD power, what makes the LT4295 superior to traditional PD controllers is that it uses an external power MOSFET to further significantly reduce overall PD heat dissipation and maximize power efficiency, which becomes more important due to the higher power levels of the PoE++ standard.
For those PoE++ PD designs that need to be able to support auxiliary power, the PD can optionally be powered by a power adapter.
The LT4320
shown at the top of Figure 4
is a 9V to 72V active diode bridge controller that replaces all four diodes in a full-wave bridge rectifier with low-loss N-channel MOSFETs to significantly reduce power dissipation and increase available voltage.
The improved power efficiency eliminates the need for bulky and expensive heat sinks, which can reduce the size of the power supply and wall transformer.
Low voltage applications can also benefit from the additional margin provided by almost eliminating the two full diode drops inherent in the hot-running diode bridge (~1.2V, or 10% of 12V), thereby increasing the application's reserve space.
With the ratification of the PoE++ standard just around the corner, developers can confidently develop products for this market. The PoE++ standard has high power levels up to 71.3 W and a wealth of new power management features that developers can use to create more dynamic and optimized systems. PSE developers should be thankful that the LTC4291-1/LTC4292 PSE 4-port chipset released by Analog Devices is stable and reliable and simplifies the BOM. At the same time, PD developers can continue to use many of Analog Devices' ICs at the other end of the cable to reduce heat dissipation and improve power efficiency.