How to Minimize Emissions in a SEPIC Converter

For modern switch-mode regulators, they are only a few nanoseconds long. With new switch technologies such as SiC or GaN, these switching transitions are particularly short. Figure 1 shows a switching transition time of approximately 1 nanosecond. The fundamental frequency must not be confused with the switching frequency of a buck regulator. However, there are ways to overcome interference issues. As shown in Figure 1, the switching edges should be as fast as possible to minimize switching losses.

Figure 1. Fast switching transitions induce interference.

To create an optimized board layout with the lowest possible radiated interference, the hot loop of the switch-mode regulator must be as small as possible—that is, the lower the parasitic inductance, the better. To illustrate the effect of fast switching currents, we performed a calculation for an example. If 1 A of current is switched in one nanosecond and there is 20 nH of parasitic inductance in the current path, a 20 V voltage offset will be generated. The calculation formula is as follows:

The interference (EMI) generated is caused by the 20 V voltage offset caused by the 20 nH parasitic inductance in the hot loop. To minimize this interference, the parasitic inductance must be kept as small as possible.

Step-down switching mode regulators require the input capacitor to be as close as possible to the high-side switch and the ground connection of the low-side switch. For a monolithic synchronous step-down switching regulator, this corresponds to the input capacitor connection to the VIN and GND of the buck regulator integrated circuit. If the inductance of these connections is as low as possible, the resulting voltage offset and electromagnetic interference will be as low as possible.

How is this concept implemented in the case of a switching regulator based on the SEPIC topology? The SEPIC topology is very popular because the input voltage can be higher or lower than the output voltage. Therefore, it is equivalent to a buck-boost topology. Figure 2 shows this topology. In addition to the buck topology, a second inductor and coupling capacitors are required.

Figure 2. Critical path (hot loop) including a SEPIC converter.

Since the SEPIC converter is also a switch-mode regulator, the same fast switching currents occur in this topology (similar to the buck converter). To minimize interference, these hot loop current paths should be as short as possible. For this purpose, each path of the buck regulator must be considered.

Does a conductor conduct electricity continuously, or only when it is powered on or off?

In Figure 2, all the currents in the light blue lines vary with fast switching. Therefore, these paths are critical thermal cycling paths and need to be constructed with as low inductance as possible. Vias or unnecessary long connecting wires should not be inserted in these paths.

The SEPIC switch-mode regulator also has critical hot loops that are essential for low EMI behavior. If these hot loops are designed well and the parasitic inductance is low, only small voltage excursions will occur, thus reducing radiated interference. In the SEPIC switch-mode regulator, it is not the input capacitor that is critical, as in the buck regulator, but the current path described in this article, as shown in Figure 2.

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