CypressUSB master-slave FPGA control implementation code

usb_test\\adc_1ch.v

  ........\\adc_fifo.ngc

  ........\\adc_fifo.v

  ........\\adc_fifo.xco

  ........\\adc_itfc.ngc

  ........\\adc_itfc.v

  ........\\adc_itfc_1ch.v

  ........\\agc_1ch.v

  ........\\agc_adj.v

  ........\\agc_itfc.v

  ........\\agc_itfc_1ch.v

  ........\\coregen.cgp

  ........\\coregen.log

  ........\\dac_2ch.v

  ........\\dac_itfc.v

  ........\\dac_rom.ngc

  ........\\dac_rom.xco

  ........\\dcm.v

  ........\\dcm.xco

  ........\\edit_fifo_imp.tcl

  ........\\fifo_adc_itfc.bld

  ........\\fifo_adc_itfc.cmd_log

  ........\\fifo_adc_itfc.lso

  ........\\fifo_adc_itfc.ngc

  ........\\fifo_adc_itfc.ngr

  ........\\fifo_adc_itfc.prj

  ........\\fifo_adc_itfc.stx

  ........\\fifo_adc_itfc.syr

  ........\\fifo_adc_itfc.tfi

  ........\\fifo_adc_itfc.v

  ........\\fifo_adc_itfc.v.bak

  ........\\fifo_adc_itfc.xst

  ........\\fifo_adc_itfc_envsettings.html

  ........\\fifo_adc_itfc_summary.html

  ........\\fifo_adc_itfc_test.v

  ........\\fifo_adc_itfc_test1.v

  ........\\fifo_adc_itfc_test1_beh.prj

  ........\\fifo_adc_itfc_test1_isim_beh.exe

  ........\\fifo_adc_itfc_test1_isim_beh.wdb

  ........\\fifo_adc_itfc_test1_isim_beh1.wdb

  ........\\fifo_adc_itfc_test_beh.prj

  ........\\fifo_adc_itfc_test_isim_beh.exe

  ........\\fifo_adc_itfc_test_isim_beh.wdb

  ........\\fifo_adc_itfc_xst.xrpt

  ........\\fifo_generator_ug175.pdf

  ........\\fifo_generator_v8_2_readme.txt

  ........\\fifo_imp.asy

  ........\\fifo_imp.cmd_log

  ........\\fifo_imp.gise

  ........\\fifo_imp.ngc

  ........\\fifo_imp.spl

  ........\\fifo_imp.sym

  ........\\fifo_imp.v

  ........\\fifo_imp.veo

  ........\\fifo_imp.xco

  ........\\fifo_imp.xise

  ........\\fifo_imp_flist.txt

  ........\\.........ste\\example_design\\fifo_imp_top.ucf

  ........\\............\\..............\\fifo_imp_top.vhd

  ........\\............\\..............\\fifo_imp_top.xdc

  ........\\............\\implement\\implement.bat

  ........\\............\\.........\\implement.sh

  ........\\............\\.........\\planAhead_rdn.bat

  ........\\............\\.........\\planAhead_rdn.sh

  ........\\............\\.........\\planAhead_rdn.tcl

  ........\\............\\.........\\xst.prj

  ........\\............\\.........\\xst.scr

  ........\\fifo_imp_xmdf.tcl

  ........\\fuse.log

  ........\\fuse.xmsgs

  ........\\fuseRelaunch.cmd

  ........\\ipcore_dir\\.lso

  ........\\..........\\adc_fifo.asy

  ........\\..........\\adc_fifo.gise

  ........\\..........\\adc_fifo.ncf

  ........\\..........\\adc_fifo.ngc

  ........\\..........\\adc_fifo.sym

  ........\\..........\\adc_fifo.v

  ........\\..........\\adc_fifo.veo

  ........\\..........\\adc_fifo.xco

  ........\\..........\\adc_fifo.xise

  ........\\..........\\adc_fifo_flist.txt

  ........\\..........\\.........ste\\example_design\\adc_fifo_top.ucf

  ........\\..........\\............\\..............\\adc_fifo_top.vhd

  ........\\..........\\............\\..............\\adc_fifo_top.xdc

  ........\\..........\\............\\implement\\implement.bat

  ........\\..........\\............\\.........\\implement.sh

  ........\\..........\\............\\.........\\planAhead_rdn.bat

  ........\\..........\\............\\.........\\planAhead_rdn.sh

  ........\\..........\\............\\.........\\planAhead_rdn.tcl

  ........\\..........\\............\\.........\\xst.prj

  ........\\..........\\............\\.........\\xst.scr

  ........\\..........\\adc_fifo_xmdf.tcl

  ........\\..........\\coregen.cgp

  ........\\..........\\coregen.log

  ........\\..........\\create_fifo_dn_imp.tcl

  ........\\..........\\fifo_dn_imp.asy

  ........\\..........\\fifo_dn_imp.gise

  ........\\..........\\fifo_dn_imp.ncf

  ........\\..........\\fifo_dn_imp.ngc