The Schur recursive algorithm is a key part of calculating short-term filter parameters in the GSM full-rate speech coding algorithm. Since it is a typical double-loop structure, it is also representative in the FPGA implementation of the algorithm. This paper analyzes the characteristics of the Schur recursive algorithm in detail, proposes a solution to implement the Schur recursive algorithm using FPGA, and analyzes the design methods of each module in its implementation process in detail.
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