zip

Design of a CMOS bandgap voltage reference with high power supply rejection ratio

  • 2013-09-22
  • 662.82KB
  • Points it Requires : 2

This paper introduces a low-temperature drift and high power supply rejection ratio bandgap reference circuit based on CSMC0.5 μm process. Based on the original Banba bandgap reference circuit, this paper adopts a common source and common gate current mirror structure and introduces a negative feedback loop to greatly improve the power supply rejection ratio of the overall circuit. The Spectre simulation analysis results show that within the temperature range of -40~100 ℃, the output voltage swing is only 1.7 mV, and the power supply rejection ratio (PSRR) reaches more than 100 dB at low frequency. The power consumption of the entire circuit is only 30 μA. It can be well applied in the design of low-power and high power supply rejection ratio LDO chips.

unfold

You Might Like

Uploader
flexbuilder
 

Recommended ContentMore

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×