DS1000-60 datasheet, PDF - EEWORLD Datasheet

DS1000-60: DescriptionSILICON DELAY LINE, TRUE OUTPUT, PDIP14; Categorylogic logic; File Size64KB，5 Pages; ManufacturerDALLAS; Websitehttp://www.dalsemi.com

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DS1000-60 Overview

SILICON DELAY LINE, TRUE OUTPUT, PDIP14

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	DALLAS
package instruction	0.300 INCH, DIP-14
Reach Compliance Code	unknow
Is Samacsys	N
Other features	BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT
series	CMOS/TTL
Input frequency maximum value (fmax)	10.4167 MHz
JESD-30 code	R-PDIP-T14
JESD-609 code	e0
Logic integrated circuit type	SILICON DELAY LINE
Number of functions	1
Number of taps/steps	5
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	75 mA
programmable delay line	NO
Prop。Delay @ Nom-Su	60 ns
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	60 ns
Base Number Matches	1

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