TC74VHCT244AFW datasheet, PDF - EEWORLD Datasheet

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TC74VHCT244AFW: DescriptionIC buff/dvr tri-ST dual 20sol; Categorylogic logic; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC74VHCT244AFW Overview

IC buff/dvr tri-ST dual 20sol

TC74VHCT244AFW Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Toshiba Semiconductor
Parts packaging code	SOIC
package instruction	SOP, SOP20,.4
Contacts	20
Reach Compliance Code	unknow
Other features	NOT AVAILABLE IN JAPAN
Control type	ENABLE LOW
series	AHCT/VHCT
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	12.8 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.008 A
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP20,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Su	9.5 ns
propagation delay (tpd)	9.5 ns
Certification status	Not Qualified
Maximum seat height	2.7 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.5 mm

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TC74VHCT240,244AF/AFW/AFT/AFK

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VHCT240AF,TC74VHCT240AFW,TC74VHCT240AFT,TC74VHCT240AFK

TC74VHCT244AF,TC74VHCT244AFW,TC74VHCT244AFT,TC74VHCT244AFK

Octal Bus Buffer

TC74VHCT240AF/AFW/AFT/AFK

Inverted, 3-State Outputs

TC74VHCT244AF/AFW/AFT/AFK

Non-Inverted, 3-State Outputs

The TC74VHCT240A and 244A are advanced high speed

CMOS OCTAL BUS BUFFFERs fabricated with silicon gate

MOS technology. They achieve the high speed operation

similar to equivalent Bipolar Schottky TTL while maintaining

the CMOS low power dissipation.

The TC74VHCT240A is an inverting 3-state buffer having two

active-low output enables. The TC74VHCT244A is a

non-inverting 3-state buffer, and has two active-low output

enables.

These devices are designed to be used with 3-state memory

address drivers, etc.

The input voltage are compatible with TTL output voltage.

These devices may be used as a level converter for interfacing

3.3 V to 5 V system.

Input protection and output circuit ensure that 0 to 5.5 V can

be applied to the input and output

(Note)

pins without regard to

the supply voltage. These structure prevents device destruction

due to mismatched supply and input/output voltages such as

battery back up, hot board insertion, etc.

Note:

Output in off-state

Note: xxxFW (JEDEC SOP) is not available in

Japan.

TC74VHCT240AF, TC74VHCT244AF

TC74VHCT240AFW, TC74VHCT244AFW

Features

•

High speed: t

6.1 ns (typ.) at V

5 V

Low power dissipation: I

µA

(max) at Ta = 25°C

Compatible with TTL outputs: V

0.8 V (max)

2.0 V (min)

Power down protection is provided on all inputs and outputs

Balanced propagation delays: t

pLH

∼

pHL

−

Low noise: V

OLP

1.0 V (max)

Pin and function compatible with the 74 series

(74AC/HC/F/ALS/LS etc.) 240/244 type.

TC74VHCT240AFT, TC74VHCT244AFT

TC74VHCT240AFK, TC74VHCT244AFK

Weight

SOP20-P-300-1.27A

SOP20-P-300-1.27

SOL20-P-300-1.27

TSSOP20-P-0044-0.65A

VSSOP20-P-0030-0.50

: 0.22 g (typ.)

: 0.46 g (typ.)

: 0.08 g (typ.)

: 0.03 g (typ.)

2006-06-01

TC74VHCT244AFW Related Products

	TC74VHCT244AFW	TC74VHCT240AFW
Description	IC buff/dvr tri-ST dual 20sol	IC inverter dual 4-input 20sol
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Maker	Toshiba Semiconductor	Toshiba Semiconductor
Parts packaging code	SOIC	SOIC
package instruction	SOP, SOP20,.4	SOP, SOP20,.4
Contacts	20	20
Reach Compliance Code	unknow	unknow
Other features	NOT AVAILABLE IN JAPAN	NOT AVAILABLE IN JAPAN
Control type	ENABLE LOW	ENABLE LOW
series	AHCT/VHCT	AHCT/VHCT
JESD-30 code	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0
length	12.8 mm	12.8 mm
Load capacitance (CL)	50 pF	50 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.008 A	0.008 A
Number of digits	4	4
Number of functions	2	2
Number of ports	2	2
Number of terminals	20	20
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE
Output polarity	TRUE	INVERTED
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP
Encapsulate equivalent code	SOP20,.4	SOP20,.4
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V
Prop。Delay @ Nom-Su	9.5 ns	10 ns
propagation delay (tpd)	9.5 ns	10 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.7 mm	2.7 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	7.5 mm	7.5 mm

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