M24C32-WMB3T datasheet, PDF - EEWORLD Datasheet

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M24C32-WMB3T: Description4K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8; Categorystorage storage; File Size788KB，54 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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M24C32-WMB3T Overview

4K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8

M24C32-WMB3T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	2 X 3 MM, MLP-8
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Maximum clock frequency (fCLK)	0.4 MHz
Data retention time - minimum	40
Durability	1000000 Write/Erase Cycles
I2C control byte	1010DDDR
JESD-30 code	R-PDSO-N8
JESD-609 code	e0
length	3 mm
memory density	32768 bi
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	4096 words
character code	4000
Operating mode	SYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
organize	4KX8
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC8,.11,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/5 V
Certification status	Not Qualified
Filter level	AEC-Q100
Maximum seat height	0.6 mm
Serial bus type	I2C
Maximum standby current	0.000002 A
Maximum slew rate	0.001 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	2 mm
Maximum write cycle time (tWC)	10 ms
write protect	HARDWARE
Base Number Matches	1

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M24C64-W M24C64-R

M24C64-F M24C64-DF

64-Kbit serial I²C bus EEPROM

Datasheet

production data

Features

•

Compatible with all I

C bus modes:

– 1 MHz

– 400 kHz

– 100 kHz

•

Memory array:

– 64 Kbit (8 Kbyte) of EEPROM

– Page size: 32 byte

– Additional Write lockable page (M24C64-D

order codes)

TSSOP8 (DW)

169 mil width

SO8 (MN)

150 mil width

•

Single supply voltage:

– 1.7 V to 5.5 V over –40 °C / +85 °C

– 1.6 V to 5.5 V over 0 °C / +85 °C

•

Write:

– Byte Write within 5 ms

– Page Write within 5 ms

PDIP8 (BN)

UFDFPN8 (MC)

DFN8 - 2x3 mm

UFDFPN5 (MH)

DFN5 -1.7x1.4 mm

•

Random and sequential Read modes

•

Write protect of the whole memory array

•

Enhanced ESD/Latch-Up protection

•

More than 4 million Write cycles

•

More than 200-years data retention

WLCSP (CS)

Thin WLCSP (CT)

Packages

•

PDIP8 ECOPACK2

•

SO8 ECOPACK2

•

TSSOP8 ECOPACK2

•

UFDFPN ECOPACK2

WLCSP

(CU)

Unsawn wafer

•

WLCSP ECOPACK2

•

Unsawn wafer (each die is tested)

March 2018

This is information on a product in full production.

DS6638 Rev 36

1/54

www.st.com

Contents

M24C64-W M24C64-R M24C64-F M24C64-DF

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1

2.2

2.3

2.4

2.5

2.6

Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Chip Enable (E2, E1, E0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Write Control (WC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

(ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.6.1

2.6.2

2.6.3

2.6.4

Operating supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1

4.2

4.3

4.4

4.5

Start condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Acknowledge bit (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Device addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.1

Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 18

Lock Identification Page (M24C64-D only) . . . . . . . . . . . . . . . . . . . . . . 18

ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 18

Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 19

Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.2

Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.2.1

2/54

DS6638 Rev 36

List of tables

M24C64-W M24C64-R M24C64-F M24C64-DF

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

WLCSP 4-bump signals vs. bump position. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 5-bump signals vs. bump position. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

WLCSP 8-bump signals vs bump position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Most significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Least significant address byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Operating conditions (voltage range W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating conditions (voltage range R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Operating conditions (voltage range F) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Input parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Cycling performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DC characteristics (M24C64-W, device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

DC characteristics (M24C64-R device grade 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

DC characteristics (M24C64-F, M24C64-DF, device grade 6) . . . . . . . . . . . . . . . . . . . . . . 29

400 kHz AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

1 MHz AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

UFDFPN5 - 1.7 × 1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead - package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch dual flat package,

no lead - package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

TSSOP8 – 3 x 4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width,

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data. . . . . . . . . . . . 40

Ultra Thin WLCSP- 4-bump, 0.795 x 0.674 mm, wafer level chip

scale package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

WLCSP- 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Ordering information scheme (unsawn wafer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4/54

DS6638 Rev 36

M24C64-W M24C64-R M24C64-F M24C64-DF

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

UFDFPN5 (DFN5) package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 4 bump ultra thin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 5-bump connections (M24C64-FCS6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

WLCSP 8-bump thin connections (M24C64-DFCT6TP/K) . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Chip enable inputs connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Write mode sequences with WC = 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write mode sequences with WC = 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Read mode sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Maximum Rbus value versus bus parasitic capacitance (Cbus) for

an I2C bus at maximum frequency fC = 400 kHz

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Maximum R

bus

value versus bus parasitic capacitance C

bus

) for

an I

C bus at maximum frequency f

= 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UFDFPN5 – 1.7x1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead - package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

UFDFPN5 - 5-lead, 1.7 × 1.4 mm, 0.55 mm thickness, ultra thin fine pitch

dual flat package, no lead recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

UFDFPN8 – 2x3 mm, 0.55 thickness, ultra thin fine pitch

dual flat package, no lead - package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

TSSOP8 – 3x4.4 mm, 0.65 mm pitch, 8-lead thin shrink small outline,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width, package outline . 38

SO8N – 3.9x4.9 mm, 8-lead plastic small outline, 150 mils body width,

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline . . . . . . . . . . . . . . . . . . . 40

Ultra Thin WLCSP- 4-bump, 0.795 x 0.674 mm,wafer level chip

scale package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Thin WLCSP- 4-bump, 0.795 x 0.674 mm, wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

WLCSP 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

(M24C64-FCS6TP/K)- package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

WLCSP - 5-bump, 0.959 x 1.073 mm, 0.4 mm pitch wafer level chip scale

recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Thin WLCSP- 8-bump, 1.073 x 0.959 mm, wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

DS6638 Rev 36

5/54

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