clock frequency from crystal or external reference
clock
One-chip tunable voltage controlled crystal oscillator
(VCXO) allows precise system frequency tuning
3.3V operation
8 pin (150 mil) SOIC package
Uses inexpensive 14pF pullable crystals with no
external capacitors required.
12mA drive capability at TTL levels
Very low phase noise PLL
•
•
•
•
•
•
The T83027 is a single-chip, low-jitter Voltage-Controlled-
Crystal-Oscillator combined with a low noise Phase
Locked Loop. The device accepts a 13.5 MHz, 14 pF
crystal, and produces a low jitter 27 MHz output
frequency. A 0 to 3.0V control signal is used to fine tune
the output clock frequency in the ±100ppm range. This
finds use in systems that have frequency matching
requirements, such as digital satellite receivers.
2.0
•
•
•
Applications
Set-top boxes
MPEG Video clock source
Oscillator replacement
Figure 1: Block Diagram
VDD1
VDD2
VIN
Load Cap Control
X2
13.5 MHz
Pullable
Crystal
X1
Load
Caps
Low
Phase
Noise
PLL
Output
Buffer
CLK
GND1
GND2
This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.
ISO9001
11.5.02
T83027
PLL Clock Generator IC with VCXO
November 2002
8-pin (150 mil) SOIC
X1
VDD1
VIN
GND2
1
2
3
4
8
7
6
5
X2
GND1
VDD2
CLK
Table 1: Pin Descriptions
PIN
TYPE
NAME
DESCRIPTION
1
2
3
4
5
6
7
8
Xi
P
I
P
O
P
P
Xi
X1
VDD1
VIN
GND2
CLK
VDD2
GND1
X2
Crystal Connection. Connect to a 13.5 MHz Pullable Crystal or reference
frequency input.
Core V
DD
. Connect to 3.3V
Voltage input to VCXO. Zero to 3V Signal Controls the Frequency of the
VCXO.
Connect to Ground.
Clock Output
Pad Driver V
DD
. Connect to 3.3V
Connect to Ground.
Crystal Connection. Connect to a 13.5 MHz pullable crystal.
Legend: I = Input
O = Output
P = Power supply connection
Xi = Crystal connections.
2
11.5.02
ISO9001
T83027
PLL Clock Generator IC with VCXO
November 2002
4.0
4.1
Functional Block Description
Voltage Controlled Crystal Oscillator
the
C
1
×
(
C
L
2
−
C
L
1
)
×
10
∆
f
(
ppm
)
=
2
×
(
C
0
+
C
L
2
)
×
(
C
0
+
C
L
1
)
6
Deviation From 27 MHz in PPM
The VCXO provides a tunable, low-jitter frequency reference. Loading capacitance for the crystal is internal to
T83027. No external components (other than the crystal resonator itself) are required for operation of the VCXO.
Tuning of the VCXO frequency is accomplished by varying the voltage on Vin (Pin 3).
The oscillator operates the crystal resonator in the parallel-resonant mode. Crystal warping, or the “pulling” of
crystal oscillation frequency, is accomplished by altering the effective load capacitance presented to the crystal by
oscillator circuit. The actual amount that changing the load capacitance alters the oscillator frequency will
dependent on the characteristics of the crystal as well as the
oscillator circuit itself.
T83027 Typical Deviation vs. Vin
13.5 MHz 14pF Crystal
Specifically, the motional capacitance of the crystal (usually
150
referred to by crystal manufacturers as C
1
), the static
capacitance of the crystal (C
0
), and the load capacitance
(C
L
) of the oscillator determine the “warping” or “pulling”
100
capability of the crystal in the oscillator circuit. A simple
formula to obtain the warping capability of a crystal oscillator
is:
50
the
the
be
0
where C
L1
and C
L2
are the two extremes of the applied load
capacitance.
EXAMPLE: A crystal with the following parameters is used.
With C
1
= 0.025pF, C
0
= 6pF, C
L1
= 10pF, and C
L2
= 20pF,
the tuning range is
-50
∆
f
=
0
.
025
×
(
20
−
10
)
×
10 6
2
×
(
6
+
20
)
×
(
6
+
10
)
-100
=
300
ppm
.
-150
0.000
0.500
1.000
1.500
2.000
2.500
3.000
Vin
4.2
Phase Locked Loop (PLL)
The on-chip PLL is a standard phase locked loop architecture that multiplies the reference frequency by two. The
frequency multiplication is exact with zero synthesis error.
3
11.5.02
ISO9001
T83027
PLL Clock Generator IC with VCXO
November 2002
5.0
Electrical Specifications
Table 2: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at
these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance,
functionality, and reliability.
PARAMETER
Supply Voltage (V
SS
= ground)
Input Voltage, dc
Output Voltage, dc
Input Clamp Current, dc (V
I
< 0 or V
I
> V
DD
)
Output Clamp Current, dc (V
I
< 0 or V
I
> V
DD
)
Storage Temperature Range (non-condensing)
Ambient Temperature Range, Under Bias
Junction Temperature
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage Protection
SYMBOL
V
DD
V
I
V
O
I
IK
I
OK
T
S
T
A
T
J
MIN.
V
SS
-0.5
V
SS
-0.5
V
SS
-0.5
-25
-50
-65
-55
MAX.
5
V
DD
+0.5
V
DD
+0.5
25
50
150
125
125
260
2
UNITS
V
V
V
mA
mA
°C
°C
°C
°C
KV
Table 3: Operating Conditions
PARAMETER
Core Supply Voltage (V
DD
)
VCXO Control Voltage, V
IN
Ambient Operating Temperature Range
Crystal Resonator Frequency
SYMBOL
V
DD
V
IN
T
A
f
XTAL
Fundamental Mode
CONDITIONS/DESCRIPTION
MIN.
3.15
0
0
12
13.5
TYP.
3.3
MAX.
3.45
V
DD
70
20
UNITS
V
V
°C
MHz
4
11.5.02
ISO9001
T83027
PLL Clock Generator IC with VCXO
November 2002
Table 4: DC Electrical Specifications
Unless otherwise stated, V
DD
= 3.15V to 3.45V , no load on any output, and ambient temperature range T
A
= 0°C to 70°C.
PARAMETER
Supply Current, Dynamic, with no load
Output High Voltage
Output Low Voltage
Input Low Current
Input High Current
Short Circuit Current
Input Low Voltage
Input High Voltage
SYMBOL
I
DD
V
OH
V
OL
I
IL
I
IH
I
OS
V
IL
V
IH
CONDITIONS/DESCRIPTION
f
XTAL
= 13.5MHz No Load
I
OH
= -12mA
I
OL
= 12mA
0 Volts X1 (Pin 1) and VIN (Pin 3) Inputs
3 Volts X1 (Pin 1) and VIN (Pin 3) Inputs
Clock Output (Pin 5)
X1 (Pin 1) being Driven
X1 (Pin 1) being Driven
MIN.
TYP.
28
MAX.
UNITS
mA
V
2.4
0.4
-60
60
±85
0.4
2.5
V
µA
µA
mA
V
Voltage Controlled Crystal Oscillator - VDD=3.3V
Crystal Loading Capacitance
Crystal Gamma
VCXO Tuning Range
VCXO Tuning Characteristic
Crystal ESR
C
L(xtal)
C
O
/C
1
f
XTAL
= 13.5 MHz; C
L(xtal)
= 14pF
gamma = 240; (peak-to peak)
Note: positive
∆F
for positive
∆V
200
250
75
35
As seen by a crystal connected to XIN and
XOUT (@ V
XTUNE
= 1.65V)
14
240
ppm
ppm/V
Ω
pF
Table 5: AC Timing Specifications
Unless otherwise stated, V
DD
= 3.15V to 3.45V, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits.
PARAMETER
Clock Output (CLK)
Duty Cycle *
Jitter, Period (peak-peak) *
Phase Noise
Rise Time *
Fall Time *
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
Ratio of high pulse width (as measured from rising
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