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Can four 16-bit DDR3 chips be designed using a 6-layer PCB? [Copy link]

I would like to ask, if 4*16bit DDR3, front and back mounting layout, using 6-layer PCB design, what should the reasonable stacking structure be? Is there any risk in 6 layers? Thank you.

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It is just a suggestion to set up 3 signal layers and 3 power layers, of which GND is on layers 2 and 5. Depending on the situation, the middle layers 3 and 4 can be the Power and middle signal layers. If there are fewer traces on the middle signal layer, copper can be appropriately applied on the middle signal layer.   Details Published on 2019-10-24 09:00
 

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It is said that some smart TV boards use two-layer boards, and DDR3.6 layers are not a problem at all.
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6-layer DDR3 has no risk

The premise is that the design is correct and reasonable, there is no risk above 4 layers

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In terms of stacking, what is a reasonable setting for 6 layers? 4 double-sided mounting, 8Byte of data, more lines, TOP--GND--SIGNAL--SIGNAL--POWER--BOT, is this reasonable?  Details Published on 2019-10-23 20:39
 
 
 

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qwqwqw2088 posted on 2019-10-23 17:24 6-layer DDR3 has no risk if the design is correct and reasonable. There is no risk above 4 layers

In terms of stacking, what is a reasonable setting for 6 layers? 4 double-sided mounting, 8Byte of data, more lines, TOP--GND--SIGNAL--SIGNAL--POWER--BOT, is this reasonable?

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For a 6-layer board, it is best to have 2 ground layers close to the device layer. This makes PCB wiring relatively easy. It is easy to lead out the ground network pins of the top layer and ground layer components with wires and connect them to the corresponding ground network through holes. In this way, for PCB board manufacturers, considering the production cost, they try to use as few blind holes and buried holes as possible, because  Details Published on 2019-10-24 08:57
 
 
 

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The available space on the 6th floor is quite large; use it slowly

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elec32156 posted on 2019-10-23 20:39 In terms of stacking, what is the reasonable setting for 6 layers? 4 double-sided mounting, 8Byte of data, more lines, TOP--GND--SIGNAL--SIGNAL--POW ...

6-layer board, preferably 2-layer ground

The ground layer is close to the device layer, so it is relatively easy to wire the PCB. It is easy to lead out the ground network pins of the top layer and ground layer components with wires and connect them to the corresponding ground network through holes. In this way, for PCB board manufacturers, considering the production cost, they try to use as few blind holes and buried holes as possible.

Because the blind and buried via processes are complex, the error rate is high

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It is just a suggestion to set up 3 signal layers and 3 power layers, of which GND is on layers 2 and 5. Depending on the situation, the middle layers 3 and 4 can be the Power and middle signal layers.

If there are fewer traces on the middle signal layer, copper can be appropriately applied on the middle signal layer.

This post is from PCB Design

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At the beginning, we planned to make the 2nd/5th layer as GND. The through-hole board we made was mainly double-sided DDR. There were many data/address lines, which occupied 4 layers. The DDR projection area was full, so there was no power plane layer.  Details Published on 2019-10-26 19:34
 
 
 

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qwqwqw2088 posted on 2019-10-24 09:00 It is just a suggestion to set up 3 signal layers and 3 power layers, of which GND is 2nd and 5th layers. Depending on the situation, the middle layers 3 and 4 can be used as power and middle signal layers. ...

At the beginning, we planned to make the 2nd/5th layer as GND. The through-hole board we made was mainly double-sided DDR. There were many data/address lines, which occupied 4 layers. The DDR projection area was full, so there was no power plane layer.

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