MT18VDDF3272Y-262XX datasheet, PDF

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MT18VDDF3272Y-262XX: DescriptionDDR DRAM Module, 32MX72, CMOS, MO-206, DIMM-184; Categorystorage storage; File Size448KB，27 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT18VDDF3272Y-262XX Overview

DDR DRAM Module, 32MX72, CMOS, MO-206, DIMM-184

MT18VDDF3272Y-262XX Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	184
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N184
JESD-609 code	e4
memory density	2415919104 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Gold (Au)
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	30

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ADVANCE

‡

256MB, 512MB (x72, ECC)

184-PIN REGISTERED DDR SDRAM DIMM

REGISTEREDDDR

SDRAM DIMM

Features

• 184-pin, dual in-line memory module (DIMM)

• Fast data transfer rates PC1600, PC2100, or PC2700

• Utilizes 200 MT/s, 266 MT/s, and 333 MT/s DDR

SDRAM components

• Registered Inputs with one-clock delay

• Phase-lock loop (PLL) clock driver to reduce loading

• ECC, 1-bit error detection and correction

• 256MB (32 Meg x 72) and 512MB (64 Meg x 72)

• V

= V

Q = +2.5V

• V

DDSPD

= +2.3V to +3.6V

• 2.5V I/O (SSTL_2 compatible)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs; center-

aligned with data for WRITEs

• Internal, pipelined double data rate (DDR)

architecture; two data accesses per clock cycle

• Bidirectional data strobe (DQS) transmitted/received

with data—i.e., source-synchronous data capture

• Differential clock inputs CK and CK#

• Four internal device banks for concurrent operation

• Programmable burst lengths: 2, 4, or 8

• Auto precharge option

• Auto Refresh and Self Refresh Modes

• 15.625µs (256MB), 7.8125µs (512MB) maximum

average periodic refresh interval

• Serial Presence Detect (SPD) with EEPROM

• Programmable READ CAS latency

MT18VDDF3272 – 256MB

MT18VDDF6472 – 512MB

For the latest data sheet, please refer to the Micron Web

site:

www.micron.com/moduleds

Figure 1: 184-Pin DIMM – MO-206

OPTIONS

MARKING

• Package

184-pin DIMM (gold)

• Frequency/CAS Latency

6ns/166MHz,(333MT/s)

7.5ns/133 MHz (266 MT/s)

10ns/100 MHz (200 MT/s)

NOTE:

CL = 2.5

CL = 2

CL = 2.5

CL = 2

-335

-262

-26A

-265

-202

1. Registered Mode will add one clock cycle to CL.

Table 1:

Address Table

256MB

512MB

Refresh Count

4K (A0–A11)

8K (A0–A12)

Row Addressing

4 (BA0, BA1)

Device Bank Addressing

32 Meg x 4

64 Meg x 4

Device Configuration

2K (A0–A9, A11) 2K (A0–A9, A11)

Column Addressing

1 (S0#)

Module Rank Addressing

32, 64 Meg x 72 DDR SDRAM DIMMs

DDF18C32_64x72G_B.fm - Rev. B 8/03 EN

‡

PRODUCTS

AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY

MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.

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Description	DDR DRAM Module, 32MX72, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.7ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.8ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.75ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.75ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.75ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.75ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.75ns, CMOS, MO-206, DIMM-184	DDR DRAM Module, 32MX72, 0.8ns, CMOS, MO-206, DIMM-184
Is it lead-free?	Lead free	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Lead free	Contains lead	Lead free	Lead free
Is it Rohs certified?	conform to	incompatible	incompatible	incompatible	incompatible	incompatible	conform to	incompatible	conform to	conform to
Maker	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology
Parts packaging code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
package instruction	DIMM,	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184	MO-206, DIMM-184
Contacts	184	184	184	184	184	184	184	184	184	184
Reach Compliance Code	compliant	unknown	compliant	compliant	compliant	unknown	compliant	compliant	compliant	compli
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST	SINGLE BANK PAGE BURST
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184	R-XDMA-N184
memory density	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bit	2415919104 bi
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	72	72	72	72	72	72	72	72	72	72
Number of functions	1	1	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1	1	1
Number of terminals	184	184	184	184	184	184	184	184	184	184
word count	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words	33554432 words
character code	32000000	32000000	32000000	32000000	32000000	32000000	32000000	32000000	32000000	32000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	32MX72	32MX72	32MX72	32MX72	32MX72	32MX72	32MX72	32MX72	32MX72	32MX72
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM	DIMM
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260	235	235	235	235	235	260	235	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
self refresh	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30	30	30	30
Maximum access time	-	-	0.7 ns	0.8 ns	0.75 ns	0.75 ns	0.75 ns	0.75 ns	0.75 ns	0.8 ns

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