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PDM41256LA10TTR

Description
Standard SRAM, 32KX8, 10ns, CMOS, PDSO28, PLASTIC, TSOP1-28
Categorystorage    storage   
File Size283KB,8 Pages
ManufacturerIXYS
Environmental Compliance  
Download Datasheet Parametric View All

PDM41256LA10TTR Overview

Standard SRAM, 32KX8, 10ns, CMOS, PDSO28, PLASTIC, TSOP1-28

PDM41256LA10TTR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?incompatible
MakerIXYS
Parts packaging codeTSOP
package instructionPLASTIC, TSOP1-28
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time10 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G28
JESD-609 codee0
length11.8 mm
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Encapsulate equivalent codeTSSOP28,.53,22
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.0005 A
Minimum standby current2 V
Maximum slew rate0.17 mA
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.55 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width8 mm
PDM41256
256K Static RAM
32K x 8-Bit
Features
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Description
The PDM41256 is a high-performance CMOS static
RAM organized as 32,768 x 8 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WE remains HIGH
and CE and OE are both LOW.
The PDM41256 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41256 comes in two versions:
the standard power version PDM41256SA and the
low power version PDM41256LA. Both versions are
functionally the same and differ only in their power
consumption.
The PDM41256 is available in a 28-pin plastic TSOP
(I) and a 28-pin 300-mil plastic SOJ.
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High-speed access times
Com’l: 7, 8, 10, 12 and 15ns
Ind’l: 8, 10, 12 and 15ns
(use 15ns for slower designs)
Low power operation (typical)
- PDM41256SA
Active: 475 mW
Standby: 100 mW
- PDM41256LA
Active: 425mW
Standby: 25 mW
Single +5V (±10%) power supply
TTL-compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - SO
Plastic TSOP (I) - T
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Functional Block Diagram
A
0
A
14
Decoder
Memory
Matrix
Addresses
8
9
10
I/O
0
I/O
7
• • • • •
Input
Data
Control
Column I/O
11
12
1
CE
WE
OE
Rev. 4.4 - 4/29/98
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