PHT0805Y1051BN datasheet, PDF - EEWORLD Datasheet

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PHT0805Y1051BN: DescriptionRESISTOR, THIN FILM, 0.02 W, 0.1 %, 25 ppm, 1050 ohm, SURFACE MOUNT, 0805, CHIP, GREEN; CategoryPassive components The resistor; File Size106KB，6 Pages; ManufacturerVishay; Websitehttp://www.vishay.com; Environmental Compliance

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PHT0805Y1051BN Overview

RESISTOR, THIN FILM, 0.02 W, 0.1 %, 25 ppm, 1050 ohm, SURFACE MOUNT, 0805, CHIP, GREEN

PHT0805Y1051BN Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Vishay
package instruction	, 0805
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	HIGH PRECISION
JESD-609 code	e2
Manufacturer's serial number	PHT
Installation features	SURFACE MOUNT
Number of terminals	2
Maximum operating temperature	215 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
method of packing	WAFFLE PACK
Rated power dissipation(P)	0.02 W
resistance	1050 Ω
Resistor type	FIXED RESISTOR
size code	0805
surface mount	YES
technology	THIN FILM
Temperature Coefficient	25 ppm/°C
Terminal surface	Tin/Silver (Sn/Ag)
Terminal shape	WRAPAROUND
Tolerance	0.1%
Operating Voltage	150 V

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PHT

Vishay Sfernice

High Precision Wraparound - High Temperature (230 °C)

Thin Film Chip Resistors

FEATURES

•

Operating temperature range:

- 55 °C; + 215 °C

•

Storage temperature: - 55 °C; + 230 °C

•

Gold terminations (< 1 µm thick)

•

4 sizes available (0603, 0805, 1206, 2010) -

other sizes upon request

INTRODUCTION

For applications such as down hole applications, the need for

parts able to withstand very severe conditions (temperature

as high as 215 °C powered or up to 230 °C un-powered) has

leaded Vishay Sfernice to push out the limit of the thin film

technology.

Designers might read the application note: Power

Dissipation Considerations in High Precision Vishay Sfernice

Thin Film Chip Resistors and Arrays (P, PRA etc…) (High

Temperature Application)

www.vishay.com/doc?53047

conjunction with this datasheet to help them to properly

design their PCBs and get the best performances of the PHT.

Vishay Sfernice R&D engineers will be willing to support any

customer design considerations.

•

Temperature coefficient down to 25 ppm

(- 55 °C; + 215 °C)

•

Tolerance down to 0.05 %

•

Load life stability: 0.5 % max after 1000 h at 215 °C

(ambient) at Pn

•

SMD wraparound

•

Compliant to RoHS directive 2002/95/EC

DIMENSIONS

in millimeters (inches)

CASE

SIZE

MAX. TOL.

+ 0.152 (+ 0.006)

MIN. TOL.

- 0.152 (- 0.006)

NOMINAL

0603

0805

1206

2010

1.52 (0.060)

1.91 (0.075)

3.06 (0.120)

5.08 (0.200)

MAX. TOL.

+ 0.127 (+ 0.005)

MIN. TOL.

- 0.127 (- 0.005)

NOMINAL

0.85 (0.033)

0.38 (0.015)

1.27 (0.050)

1.60 (0.063)

2.54 (0.100)

0.5 (0.02)

± 0.127 (0.005)

0.13 (0.005)

0.40 (0.016)

0.48 (0.019)

D/E

NOMINAL

TOLERANCE

** Please see document “Vishay Material Category Policy”:

www.vishay.com/doc?99902

www.vishay.com

For technical questions, contact:

sfer@vishay.com

Document Number: 53050

Revision: 10-Aug-10

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