HYM7V65401ATRG-10S datasheet, PDF

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HYM7V65401ATRG-10S: DescriptionSynchronous DRAM Module, 4MX64, 6ns, CMOS, DIMM-168; Categorystorage storage; File Size287KB，14 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/

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HYM7V65401ATRG-10S Overview

Synchronous DRAM Module, 4MX64, 6ns, CMOS, DIMM-168

HYM7V65401ATRG-10S Parametric

Parameter Name	Attribute value
Maker	SK Hynix
Parts packaging code	DIMM
package instruction	DIMM, DIMM168
Contacts	168
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	6 ns
Maximum clock frequency (fCLK)	100 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N168
memory density	268435456 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	168
word count	4194304 words
character code	4000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM168
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	4096
Maximum standby current	0.008 A
Maximum slew rate	0.8 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL

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4Mx64 bit SDRAM Unbuffered DIMM R-Series

PC/100 SDRAM Specification Supporting

based on 4Mx16 SDRAM, LVTTL, 2/4-Banks & 4K/8KRefresh

HYM7V65400A/ HYM7V65401A/ HYM7V65430A/ HYM7V65431A

DESCRIPTION

The HYM7V65400A/ 65401A/ 65430A/ 65431A R-Series are high speed 3.3-Volt synchronous dynamic

RAM Modules composed of four 4Mx16 bit Synchronous DRAMs in 54-pin TSOPII and 8-pin TSSOP 2K bit

PROM on a 168-pin glass-epoxy printed circuit board. Two 0.33µF and one 0.1µF decoupling capacitors

per each SDRAM are mounted on the module.

The HYM7V65400A/ 65401A/ 65430A/ 65431A R-Series are gold plated socket type Dual In-line Memory

Modules suitable for easy interchange and addition of 32M bytes memory. All addresses, data and control

inputs are latched on the rising edge of the master clock input. The data paths are internally pipelined to

achieve very high bandwidths.

FEATURES

•

1.375” (34.93mm) PCB Height

•

168-Pin Unbuffered DIMM with Single Sided

•

Two 0.33µF and one 0.1µF decoupling

capacitors adopted

•

Serial Presence Detect with Serial E

PROM

•

Meets all the other JEDEC specifications

•

Single 3.3V±0.3V power supply

•

All device pins are LVTTL compatible

•

4096 refresh cycles every 64ms or 8192 refresh

cycles every 128ms

•

Fully synchronous ; all inputs referenced to

positive edge of system clock

•

Dual or Quad internal banks with single pulsed

/RAS

•

Auto precharge/precharge all banks by A

flag

•

Possible to assert random column address

every clock cycle

•

Interleaved auto refresh mode

•

Programmable burst lengths and sequences

- 1,2,4,8,full page for Sequential type

- 1,2,4,8 for Interleave type

•

Programmable /CAS latency ; 2,3 clocks

•

Support clock suspend/power down mode by

CKE0

•

Data mask function by DQM

•

Mode register set programming

•

Burst termination command

•

Self refresh provides minimum power, full

internal refresh control

ORDERING INFORMATION

Part No.

HYM7V65400ATRG - 8/10P/10S

HYM7V65401ATRG - 8/10P/10S

HYM7V65430ATRG - 8/10P/10S

HYM7V65431ATRG - 8/10P/10S

Max. Frequency

125/ 100/ 100 MHz

SDRAM Bank

2 Banks

4 Banks

2 Banks

4 Banks

Ref.

Package

TSOPII

Plating

Gold

BASED COMPONENTS

Module Part No.

HYM7V65400ATRG

HYM7V65401ATRG

Based Comp. Part No.

HY57V651610ATC

HY57V651620ATC

Module Part No.

HYM7V65430ATRG

HYM7V65431ATRG

Based Comp. Part No.

HY57V641610ATC

HY57V641620ATC

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume

any responsibility for use of circuits described. No patent licenses are implied.

Oct. 1998

Rev 9.1

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