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HYM71V631601TH-75

Description
Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, DIMM-168
Categorystorage    storage   
File Size316KB,13 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
Download Datasheet Parametric Compare View All

HYM71V631601TH-75 Overview

Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, DIMM-168

HYM71V631601TH-75 Parametric

Parameter NameAttribute value
MakerSK Hynix
Parts packaging codeDIMM
package instructionDIMM, DIMM168
Contacts168
Reach Compliance Codecompliant
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
JESD-30 codeR-XDMA-N168
memory density1073741824 bit
Memory IC TypeSYNCHRONOUS DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals168
word count16777216 words
character code16000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16MX64
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Encapsulate equivalent codeDIMM168
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
self refreshYES
Maximum standby current0.012 A
Maximum slew rate2.4 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
16Mx64 bits
PC133 SDRAM Unbuffered DIMM
based on 16Mx8 SDRAM with LVTTL, 4 banks & 4K Refresh
HYM71V631601 H-Series
DESCRIPTION
The Hyundai HYM71V631601 H-Series are 16Mx64bits Synchronous DRAM Modules. The modules are composed of
eight 16Mx8bit CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP
package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each
SDRAM are mounted on the PCB.
The HYM71V631601 H-Series are Dual In-line Memory Modules suitable for easy interchange and addition of
128Mbytes memory. The HYM71V631601 H-Series are offering fully synchronous operation referenced to a positive
edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are
internally pipelined to achieve very high bandwidth.
FEATURES
PC133/PC100MHz support
168pin SDRAM Unbuffered DIMM
Serial Presence Detect with EEPROM
1.375” (34.93mm) Height PCB with Single Sided
components
Single 3.3
±
0.3V power supply
All devices pins are compatible with LVTTL interface
Data mask function by DQM
SDRAM internal banks : four banks
Module bank : one physical bank
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
-. 1, 2, 4, 8 or Full Page for Sequential Burst
-. 1, 2, 4 or 8 for Interleave Burst
Programmable /CAS Latency
-. 2, 3 Clocks
ORDERING INFORMATION
PART NO.
HYM71V631601TH-75
HYM71V631601LTH-75
MAX.
FREQUENCY
133MHz
133MHz
INTERNAL
BANK
4 Banks
REF.
4K
POWER
Normal
Low Power
SDRAM
PACKAGE
TSOP-II
PLATING
Gold
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume
any responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.1/Dec.99
©1999
Hyundai MicroElectronics

HYM71V631601TH-75 Related Products

HYM71V631601TH-75 HYM71V631601LTH-75
Description Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, DIMM-168 Synchronous DRAM Module, 16MX64, 5.4ns, CMOS, DIMM-168
Maker SK Hynix SK Hynix
Parts packaging code DIMM DIMM
package instruction DIMM, DIMM168 DIMM, DIMM168
Contacts 168 168
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
access mode FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Maximum access time 5.4 ns 5.4 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 133 MHz 133 MHz
I/O type COMMON COMMON
JESD-30 code R-XDMA-N168 R-XDMA-N168
memory density 1073741824 bit 1073741824 bit
Memory IC Type SYNCHRONOUS DRAM MODULE SYNCHRONOUS DRAM MODULE
memory width 64 64
Number of functions 1 1
Number of ports 1 1
Number of terminals 168 168
word count 16777216 words 16777216 words
character code 16000000 16000000
Operating mode SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C
organize 16MX64 16MX64
Output characteristics 3-STATE 3-STATE
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code DIMM DIMM
Encapsulate equivalent code DIMM168 DIMM168
Package shape RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
power supply 3.3 V 3.3 V
Certification status Not Qualified Not Qualified
refresh cycle 4096 4096
self refresh YES YES
Maximum standby current 0.012 A 0.012 A
Maximum slew rate 2.4 mA 2.4 mA
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount NO NO
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal form NO LEAD NO LEAD
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL

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