APFC (active power factor correction) technology is to replace the passive devices in the rectifier circuit with active switching devices or add a power converter between the rectifier and the load, compensating the rectifier input current into a sine wave in phase with the grid voltage, eliminating harmonics and reactive current, and improving the power factor and energy utilization of the grid. From the perspective of decoupling theory, three-phase PFC technology can be divided into three categories: non-decoupled three-phase PFC, partially decoupled three-phase PFC, and fully decoupled three-phase PFC. Fully decoupled three-phase PFC, such as a 6-switch full-bridge circuit, has superior performance, but the control algorithm is complex and the cost is high. The single-switch three-phase boost PFC circuit works in DCM mode and belongs to non-decoupled three-phase PFC. It is widely used due to its low cost and easy control, but the voltage stress of the switching device is large, and the power supply capacity is difficult to increase. It is only suitable for low-power occasions. The partially decoupled three-phase PFC circuit has the characteristics of low cost and high efficiency, and has broad application prospects. The three-phase dual-switch circuit is a typical partially decoupled PFC circuit. This paper simulates and experiments on the working principle and control strategy of the circuit.

　　1 Working principle of three-phase dual-switch PFC circuit in CCM

　　1.1 Main circuit structure

　　The circuit connects the neutral line of the three-phase AC power to the midpoint of two series-connected switches S1 and S2 and the midpoint of two series-connected capacitors C1 and C2 to form a three-level (positive, negative voltage and zero voltage) structure. The two series-connected capacitors are connected in parallel with balancing resistors R1 and R2 respectively, so that the output voltages of the upper and lower half bridges acting on capacitors C1 and C2 are equal. The circuit structure is shown in Figure 1.

　　Due to the existence of the neutral line, the upper and lower half bridges are independent of each other, forming the basis for partial decoupling, and the voltage borne by the switch device is only 1/2 of the output voltage, which reduces the selection requirements for the switch tube. On this basis, some new dual-switch topologies are proposed, but the structure is complex and difficult to control.

　　1.2 Process Analysis

　　Based on the above analysis, the upper and lower half bridges can be analyzed as independent structures. Taking the upper half bridge as an example, the equivalent circuit diagram is shown in Figure 2.

　　Due to the symmetrical characteristics of the three-phase voltage, in every 2π/3 interval, only one phase has the maximum positive phase voltage. If the instantaneous current of each phase can track its maximum phase voltage in the 2π/3 interval, the maximum current correction can be achieved. Based on this idea, the change of the a-phase current in [π/6～5π/6] is analyzed. Because Ua is the largest in this interval, it can be analyzed in three stages.

　　In the first stage [π/6～π/3], Ua>Uc>O, S1 is turned on at time t0, and the a-phase and c-phase inductors are charged simultaneously. The conduction time is ton. The equivalent circuit during this period is shown in Figure 3. Since the carrier frequency of the switching device is much larger than the power frequency, the three-phase power supply can be equivalent to the corresponding DC voltage source for the S1 switching cycle circuit analysis. Based on this assumption, it can be seen that the higher the carrier frequency, the closer the current waveform is to the inference result. The a-phase current at this time refers to formula (1):

　　Where: ILc(t0) is the initial value of phase c current.

　　At time t1, S1 is turned off, and the voltage source and the energy storage inductor jointly provide energy to the load, and the inductor current decreases. Since Uc is small, the decrease rate of iLc is greater. The equivalent circuit of this period is shown in Figure 4. At this time, the inductor current of phase a is shown in formula (3):

　　Where: ILa(t1) is the initial value of phase a current, U01 is the output voltage of the upper half bridge.

　　Similarly, the c-phase current is given by equation (4):

　　Where: ILc(t1) is the initial value of phase c current.

　　The waveforms of iLa and iLb can be deduced from the above formulas as shown in Figure 5. Due to the continuous mode of current, the a-phase inductor discharge stage will not return to zero, and the change slope is determined by the phase voltage amplitude, as shown in equations (1) and (3). Since the single-phase circuit is equivalent to a Boost circuit, when the circuit operates in CCM mode, the duty cycle calculation is shown in equation (5):

　　Where: Uo1 is the output voltage of the upper half bridge.

　　In the second stage [π/3～2π/3], the positive phase current is only in phase a, so the on and off of the switch will only cause the change of iLa.

　　In the third stage [2π/3～5π/6], the voltages of phases a and b are positive, and the on and off of the switch will cause changes in iLa and iLb. The circuit analysis process is similar to that of the first stage. From the above analysis, it can be seen that in [π/6～5π/6], the current of phase a is controlled to follow its maximum phase voltage, which can not only make the current of phase a get the maximum compensation, but also make the current of adjacent phases get a certain compensation. This control method is simple and feasible, but because the circuit is in a partially decoupled state, the c (or b) phase cannot be independently controlled in the l (or 3) stage, and the compensation effect is not ideal. How to optimize the control to reduce the c (or b) current harmonics remains to be solved.

　  2 Control and simulation in CCM mode

　　2.1 Control Analysis

　　According to whether the inductor current is continuous, the working mode of the APFC circuit can be divided into continuous conduction mode (CCM), discontinuous conduction mode (DCM) and the critical discontinuous conduction mode (DCM boundary) between the two. The circuit can work in DCM and CCM mode. When working in DCM mode, THD is still large. This article uses average current control technology. Since the average current control circuit has the advantages of small size, light weight, low system noise and high stability, it has been widely used. The overall control block diagram is shown in Figure 6.

　　Combined with the analysis in Section 1, its basic control principle is: adopt a dual closed-loop control strategy, that is, the voltage outer loop and the current inner loop are combined. The task of the voltage outer loop is to sample the output voltage and compare it with the given value. The difference is multiplied by the maximum (minimum) value of the three-phase AC voltage after PI regulation as the phase given, and then the maximum (minimum) value of the actual input three-phase current is sampled. The difference between the two is compared with the triangular carrier to generate a drive signal to drive the MOS tube. The MOS tubes of the upper and lower bridge arms are completely independent and do not affect each other. The advantages of this control are: optimal control of each phase to the greatest extent (in the interval of 2π/3), the control algorithm is simple, the digital control method is used, and the cost is low. High cost performance. The actual correction process is (taking the positive half bridge as an example): when the output is greater than 400 V, the error is positive, and after PI regulation, the error is positively amplified, and the unit sinusoidal current with the same phase as the input voltage obtained by the multiplier also increases accordingly, and the difference with the actual current increases, which increases the duty cycle of PWM and reduces the output voltage.

　　2.2 Simulation analysis

　　The simulation in this paper is based on the Matlab/Simulink platform, and is built using the components in the SimPowerSystems module. The application of Matlab/Simulink does not require the establishment of models of various modules, and can quickly verify the feasibility of the system and the effectiveness of the control algorithm. The simulation parameters of the circuit are: input voltage: three-phase AC 380 V; output voltage: 800 V; switching frequency: 10 kHz; Boost inductance: 300μH; output filter capacitor: 470μF; balance resistance: 100 kΩ; load resistance: 100 Ω; output power: 6.4 kW. The simulation circuit of the control module of the upper bridge arm should be noted: the instantaneous value of the three-phase voltage is generally sampled as a given value after rectification, but due to the presence of inductance and capacitance, the waveform after rectification is not a standard steamed bun wave, so the three-phase voltage at the front end of the rectification is taken as a given value; the triangle carrier module is taken from the plecs toolbox, which is relatively easy to set up, and the carrier frequency is 10 kHz; the addition and subtraction module and the hysteresis module are combined, and the function of the voltage (current) comparator can be realized by setting the loop width to 0; the voltage setting of the lower bridge arm is taken from the absolute value of the minimum voltage of the negative half bridge (not the maximum voltage). On this basis, the waveform obtained by simulation is shown in Figure 7. By observing the current waveforms of phase a and phase c, it can be seen that the circuit works in CCM mode. In [π/6～5π/6], the current of phase a is compensated to the maximum; in [0～π/6], the current compensation effect of phase a is relatively poor, because the control quantity at this time is the current of phase c, and the current of phase c is compensated to the maximum; similarly, in [5π/6～π], the current of phase b is compensated to the maximum, that is, the current of phase c is compensated, but the current waveform of phase a is destroyed. Among them, the THD of phase a current is 13.76%, and the amplitude of the 3rd and 5th harmonics is relatively large. The harmonic injection method can be considered to eliminate the 3rd and 5th harmonics. The average value of the half-bridge voltage is 400.2 V, and the average value of the load voltage is 800 V. From the simulation results, the basic idea of ​​control is correct.

　　3 Experimental analysis

　　The control chip of this experiment uses DSP2407, which has rich resources, including event manager EV and A/D module. The driver chip uses M57962L, which integrates overcurrent protection circuit and overcurrent protection output terminal. The hardware control block diagram of this experiment is shown in Figure 8.

　　The algorithms for implementing CCM control are all completed in DSP, and the external hardware only needs to detect the 8 signals required for control. It can be seen that the hardware circuits required by DSP are relatively small, which makes the modification and maintenance of the control system quite easy and convenient. The actual waveform and the simulation conclusion are basically consistent, as shown in Figure 9 and Figure 10. In the figure, at [0～π／6], the compensation effect of phase a current is the best; at [π／6～5π／6] and [5π／6～π], the current is relatively flat and the compensation effect is relatively poor, which is determined by the characteristics of partial decoupling.

　　4 Conclusion

　　This paper proposes a control strategy for a three-phase dual-switch PFC circuit in CCM mode, analyzes the working principle of the circuit, gives the waveform and working equation expression of the circuit in the switching cycle, and verifies the correctness of the circuit analysis through simulation and experimental results. The circuit has a simple structure, easy control, low cost, low input current harmonics, and high power factor, and is suitable for medium and high power applications.