IC,LOGIC GATE,2/2/3/4IN AND-NOR,S-TTL,DIP,14PIN,CERAMIC
Parameter Name | Attribute value |
Is it lead-free? | Contains lead |
Is it Rohs certified? | incompatible |
package instruction | DIP, |
Reach Compliance Code | unknown |
series | S |
JESD-30 code | R-PDIP-T14 |
JESD-609 code | e0 |
Logic integrated circuit type | AND-OR-INVERT GATE |
Number of functions | 1 |
Number of entries | 11 |
Number of terminals | 14 |
Maximum operating temperature | 125 °C |
Minimum operating temperature | -55 °C |
Output characteristics | OPEN-COLLECTOR |
Package body material | PLASTIC/EPOXY |
encapsulated code | DIP |
Package shape | RECTANGULAR |
Package form | IN-LINE |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
propagation delay (tpd) | 12 ns |
Filter level | MIL-STD-883 Class B |
Maximum supply voltage (Vsup) | 5.5 V |
Minimum supply voltage (Vsup) | 4.5 V |
Nominal supply voltage (Vsup) | 5 V |
surface mount | NO |
technology | TTL |
Temperature level | MILITARY |
Terminal surface | TIN LEAD |
Terminal form | THROUGH-HOLE |
Terminal location | DUAL |
Maximum time at peak reflow temperature | NOT SPECIFIED |
Base Number Matches | 1 |