FT6198AL-20JI datasheet, PDF - EEWORLD Datasheet

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FT6198AL-20JI: DescriptionStandard SRAM, 16KX4, 20ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-24; Categorystorage storage; File Size2MB，14 Pages; ManufacturerForce Technologies Ltd.

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FT6198AL-20JI Overview

Standard SRAM, 16KX4, 20ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-24

FT6198AL-20JI Parametric

Parameter Name	Attribute value
Parts packaging code	SOJ
package instruction	SOJ,
Contacts	24
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	20 ns
JESD-30 code	R-PDSO-J24
length	15.87 mm
memory density	65536 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of terminals	24
word count	16384 words
character code	16000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16KX4
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	3.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.5 mm
Base Number Matches	1

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FT6198(L)

FT6198A(L)

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25 ns (Commercial)

– 12/15/20/25/35 ns (Industrial)

– 15/20/25/35/45 ns (Military)

Low Power Operation (Commercial/Military)

5V ± 10% Power Supply

Data Retention, 10

µA

Typical Current from 2.0V

FT6198L/FT6198AL

(Military)

Ultra High Speed 16K x 4

Static CMOS Ram

Output Enable & Chip Enable Control Functions

– Single Chip Enable

FT6198

– Dual Chip Enable

FT6198A

Common Inputs and Outputs

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 24-Pin 300 mil DIP

– 24-Pin 300 mil SOJ

– 28-Pin 350 x 550 mil LCC

DESCRIPTION

The

FT6198/L

and

FT6198A/L

are 65,536-bit ultra high-

speed static RAMs organized as 16K x 4. Each device

features an active low Output Enable control to eliminate

data bus contention. The

FT6198/L

also have an active

low Chip Enable (the

FT6198A/L

have two Chip Enables,

both active low) for easy system expansion. The CMOS

memories require no clocks or refreshing and have equal

access and cycle times. Inputs are fully TTL-compatible.

The RAMs operate from a single 5V ± 10% tolerance

power supply. Data integrity is maintained with supply

voltages down to 2.0V. Current drain is typically 10

µA

from a 2.0V supply.

Access times as fast as 12 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption to a low 715

mW active, 193 mW standby.

The

FT6198/L

and

FT6198A/L

are available in 24-pin

300 mil DIP and SOJ, and 28-pin 350 x 550 mil LCC

packages providing excellent board level densities.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

FT6198A ONLY

DIP (P4, C4, D4),

SOJ (J4)

FT6198

(FT6198A)

LCC (L5)

FT6198

(FT6198A)

REV 1

1/14

2008

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