NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6SLCEC
Rev. 5, 10/2017
MCIMX6LxDVN10xx
MCIMX6LxEVN10xx
i.MX 6SoloLite
Applications Processors
for Consumer Products
Package Information
Plastic Package
13 x 13 mm, 0.5 mm pitch
Ordering Information
See
Table 1 on page 3
1
Introduction
1
The i.MX 6SoloLite processor represents the latest
achievement in integrated multimedia applications
processors, which are part of a growing family of
multimedia-focused products that offer high
performance processing and are optimized for lowest
power consumption.
The processor features NXP’s advanced implementation
of the a single ARM
®
Cortex
®
-A9 MPCore™ multicore
processor, which operates at speeds up to 1 GHz. It
includes 2D graphics processor and integrated power
management. The processor provides a 32-bit
DDR3-800 memory interface and a number of other
interfaces for connecting peripherals, such as WLAN,
Bluetooth™, GPS, hard drive, displays, and camera
sensors.
The i.MX 6SoloLite processor is specifically useful for
applications, such as:
• Color and monochrome eReaders
• Entry level tablets
• Barcode scanners
2
3
4
5
6
7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Updated Signal Naming Convention . . . . . . . . . . . . 7
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 15
3.2 Recommended Connections for Unused Analog
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Power Supplies Requirements and Restrictions . . 26
4.3 Integrated LDO Voltage Regulator Parameters . . . 27
4.4 PLL’s Electrical Characteristics . . . . . . . . . . . . . . . 29
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 30
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 31
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 35
4.8 Output Buffer Impedance Parameters . . . . . . . . . . 38
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 40
4.10 External Peripheral Interface Parameters . . . . . . . 52
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . 80
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . . 80
5.2 Boot Devices Interfaces Allocation . . . . . . . . . . . . 81
Package Information and Contact Assignments . . . . . . . 82
6.1 Updated Signal Naming Convention . . . . . . . . . . . 82
6.2 13 x 13mm Package Information. . . . . . . . . . . . . . 83
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
Introduction
The i.MX 6SoloLite processor features:
• Applications processor—The processor enhances the capabilities of high-tier portable applications
by fulfilling the ever increasing MIPS requirements of operating systems and games. The Dynamic
Voltage and Frequency Scaling (DVFS) provides significant power reduction, allowing the device
to run at lower voltage and frequency with sufficient MIPS for tasks, such as audio decode.
• Multilevel memory system—The multilevel memory system of each processor is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processor supports
many types of external memory devices, including DDR3, LPDDR2, NOR Flash, PSRAM,
cellular RAM, and managed NAND, including eMMC up to rev 4.4/4.41.
• Smart speed technology—The processor has power management throughout the IC that enables the
rich suite of multimedia features and peripherals to consume minimum power in both active and
various low power modes. Smart speed technology enables the designer to deliver a feature-rich
product, requiring levels of power far lower than industry expectations.
• Dynamic voltage and frequency scaling—The processor improves the power efficiency of devices
by scaling the voltage and frequency to optimize performance.
• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a
multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, and a
programmable smart DMA (SDMA) controller.
• Powerful graphics acceleration—Each processor provides three independent, integrated graphics
processing units: 2D BLit engine, a 2D graphics accelerator, and dedicated OpenVG™ 1.1
accelerator.
• Interface flexibility—The processor supports connections to a variety of interfaces: LCD
controller, CMOS sensor interface (parallel), high-speed USB on-the-go with PHY, high-speed
USB host PHY, multiple expansion card ports (high-speed MMC/SDIO host and other),
10/100 Mbps Ethernet controller, and a variety of other popular interfaces (such as UART, I
2
C, and
I
2
S serial audio).
• Electronic Paper Display Controller—The processor integrates EPD controller that supports E Ink
color and monochrome with up to 2048 x 1536 resolution at 106 Hz refresh, 4096 x 4096 resolution
at 20 Hz refresh and 5-bit grayscale (32-levels per color channel).
• Advanced security—The processor delivers hardware-enabled security features that enable secure
e-commerce, digital rights management (DRM), information encryption, secure boot, and secure
software downloads. The security features are discussed in detail in the i.MX 6SoloLite security
reference manual (IMX6SLSRM). Contact your local NXP representative for more information.
• Integrated power management—The processor integrates linear regulators and generate internally
all the voltage levels for different domains. This significantly simplifies system power
management structure.
• GPIO with interrupt capabilities—The new GPIO pad design supports configurable dual voltage
rails at 1.8 V and 3.3 V supplies. The pad is configurable to interface at either voltage level.
1.1
Ordering Information
Table 1
provides examples of orderable part numbers covered by this data sheet.
Table 1
does not include
all possible orderable part numbers. The latest part numbers are available on
nxp.com/imx6series.
If your
i.MX 6SoloLite Applications Processors for Consumer Products, Data Sheet, Rev. 5, 10/2017
2
NXP Semiconductors
Introduction
desired part number is not listed in
Table 1,
or you have questions about available parts, see
nxp.com/imx6series
or contact your NXP representative.
Table 1. Example Orderable Part Numbers
Part Number
MCIMX6L8DVN10AB
MCIMX6L8DVN10AC
MCIMX6L7DVN10AB
MCIMX6L7DVN10AC
MCIMX6L3DVN10AB
MCIMX6L3DVN10AC
MCIMX6L3EVN10AB
MCIMX6L3EVN10AC
MCIMX6L2DVN10AB
MCIMX6L2DVN10AC
MCIMX6L2EVN10AB
MCIMX6L2EVN10AC
1
2
Options
GPU, EPDC
GPU, EPDC
EPDC, no GPU
EPDC, no GPU
GPU, no EPDC
GPU, no EPDC
GPU, no EPDC
GPU, no EPDC
no GPU, no EPDC
no GPU, no EPDC
no GPU, no EPDC
no GPU, no EPDC
Speed
Grade
1
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
1GHz
Temperature
(Tj)
0°C to +95°C
0°C to +95°C
0°C to +95°C
0°C to +95°C
0°C to +95°C
0°C to +95°C
-40°C to +105°C
-40°C to +105°C
0°C to +95°C
0°C to +95°C
-40°C to +105°C
-40°C to +105°C
Package
2
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
13x13mm, 0.5mm pitch BGA
If a 24 MHz input clock is used (required for USB), the maximum SoC speed is limited to 996 MHz.
Case 2240 is RoHS compliant, lead-free moisture sensitivity level 3 (MSL).
Figure 1
describes the part number nomenclature so that users can identify the characteristics of the
specific part number they have (for example, Cores, Frequency, Temperature Grade, Fuse options, Silicon
revision).
i.MX 6SoloLite Applications Processors for Consumer Products, Data Sheet, Rev. 5, 10/2017
NXP Semiconductors
3
Introduction
MC
IMX6
X
@
+
VV
$$
%
A
Silicon revision
1
Rev 1.0
Rev 1.2
Rev 1.3
Rev 1.4
Qualification level
Prototype samples
Mass production
Special
MC
PC
MC
SC
A
A
B
2
C
Part # series
i.MX 6SoloLite
X
L
Fusing
Supports E-INK EPDC if EPD
enabled
%
A
Part differentiator
GPU, EPD
No GPU, EPD
GPU, no EPD
No GPU, no EPD
@
8
7
3
2
Frequency
1 GHz
$$
10
Package type
MAPBGA 13x13 0.5mm
RoHS
VN
Temperature Tj
Commercial: 0 to + 95
°
C
Extended commercial: -40 to + 105
°
C
1. See the nxp.com\imx6series Web page for latest information on the available silicon revision.
2. Rev 1.2 (USB_ANALOG_DIGPROG register = 0x0062_0002)
Rev 1.3 (USB_ANALOG_DIGPROG register = 0x0062_0003)
+
D
E
Figure 1. Part Number Nomenclature—i.MX 6SoloLite
1.2
Features
The i.MX 6SoloLite processor is based on ARM Cortex-A9 MPCore multicore processor, which has the
following features:
• ARM Cortex-A9 MPCore CPU processor (with TrustZone)
• The core configuration is symmetric, where each core includes:
— 32 KByte L1 Instruction Cache
— 32 KByte L1 Data Cache
— Private Timer and Watchdog
— Cortex-A9 NEON MPE (Media Processing Engine) co-processor
The ARM Cortex-A9 MPCore complex includes:
• General Interrupt Controller (GIC) with 128 interrupt support
• Global Timer
• Snoop Control Unit (SCU)
• 256 KB unified I/D L2 cache
• Two Master AXI (64-bit) bus interfaces output of L2 cache
• Frequency of the core (including NEON and L1 cache) as per
Table 9, "Operating Ranges," on
page 21
i.MX 6SoloLite Applications Processors for Consumer Products, Data Sheet, Rev. 5, 10/2017
4
NXP Semiconductors
Introduction
•
NEON MPE coprocessor
— SIMD Media Processing Architecture
— NEON register file with 32x64-bit general-purpose registers
— NEON Integer execute pipeline (ALU, Shift, MAC)
— NEON dual, single-precision floating point execute pipeline (FADD, FMUL)
— NEON load/store and permute pipeline
The SoC-level memory system consists of the following additional components:
— Boot ROM, including HAB (96 KB)
— Internal multimedia / shared, fast access RAM (OCRAM, 128 KB)
• External memory interfaces:
— 16-bit, and 32-bit DDR3-800, and LPDDR2-800 channels
— 16/32-bit NOR Flash.
— 16/32-bit PSRAM, Cellular RAM (32 bits or less)
Each i.MX 6SoloLite processor enables the following interfaces to external devices (some of them are
muxed and not available simultaneously):
• Displays—Total of three interfaces are available.
— LCD, 24-bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz)
— EPDC, color, and monochrome E Ink, up to 1650 x 2332 resolution and 5-bit grayscale
• Camera sensors:
— Parallel Camera port (up to 16-bit and up to 66 MHz peak)
• Expansion cards:
— Four MMC/SD/SDIO card ports all supporting:
– 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104
mode (104 MB/s max)
– 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR
and DDR modes (104 MB/s max)
– 4-bit or 8-bit transfer mode specifications for eMMC chips up to 200 MHz in HS200 mode
(200 MB/s max)
• USB
:
— Two High Speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
— One USB 2.0 (480 Mbps) hosts:
– One HS hosts with integrated HS-IC USB (High Speed Inter-Chip USB) Phy
• Miscellaneous IPs and interfaces:
— SSI block—capable of supporting audio sample frequencies up to 192 kHz stereo inputs and
outputs with I
2
S mode
— Five UARTs, up to 5.0 Mbps each:
– Providing RS232 interface
– Supporting 9-bit RS485 multidrop mode
i.MX 6SoloLite Applications Processors for Consumer Products, Data Sheet, Rev. 5, 10/2017
NXP Semiconductors
5
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